LC72717PW

No.A2064-10/27

(4) Layer 4 CRC check circuit (CCB address FCh)

This is a function to detect the error in the data group (Layer 4 CRC), transmitting the data group of specified

number of bytes, via the CCB interface, to LSI. The CCB address is FCh. In this case, it is not necessary to send

register address.

The length of data group to be transmitted is on the 8-bit units. Here is not any upper limit (such as N pieces in the

figure below) for the length of data to be transmitted at a time and data transmission can be divided into multiple

times.

(5) Register output (CCB address Fad)

This is the dedicated register that can read only the status register (STAT) and block number register (BLNO) in LSI.

To DI, the CCB address (Fad) is input. Data is output in order of the status register and the block number register.

DO

DO0

B0

B1

B2

B3

A0

A1

A2

A3

DO1

DO285 DO286

tCH

tCL

CE

CL

DI

tSU

tHD

tEL

tES

DO287

DO2

tDDO

tEH

tDDO2

CE

CL

DI

B0

B1

B2

B3

A0

A1

A2

A3

CR1

N-3

N-2

N-1

tCH

tCL

CRC4 pin output

tSU

tHD

tEL

tES

tEH

tCRC

Output after

transmission

of N pieces

Note: The number of Ns must be on the 8-bit units.

CR0

CE

CL

DI

DO

ST0

B0

B1

B2

B3

A0

A1

A2

A3

ST1

BLN5 BLN6

tCH

tCL

tSU

tHD

tEL

tES

BLN7

ST2

tDDO

tEH

tDDO2