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LM2524D Fiches technique(PDF) 5 Page - Texas Instruments |
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LM2524D Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 29 page LM2524D, LM3524D www.ti.com SNVS766E – JUNE 2009 – REVISED MAY 2013 Electrical Characteristics (1) (continued) Symbol Parameter Conditions LM2524D LM3524D Units Typ Tested Design Typ Tested Design Limit(2) Limit(3) Limit(2) Limit(3) SHUT DOWN SECTION VSD High Input Voltage V(Pin 2) − V(Pin 1) ≥ 150 mV 1 0.5 1 0.5 VMin 1.5 1.5 VMax ISD High Input Current I(pin 10) 1 1 mA OUTPUT SECTION (EACH OUTPUT) VCES Collector Emitter Voltage IC ≤ 100 μA 55 40 VMin Breakdown ICES Collector Leakage Current VCE = 60V VCE = 55V 0.1 50 μAMax VCE = 40V 0.1 50 VCESAT Saturation Voltage IE = 20 mA 0.2 0.5 0.2 0.7 VMax IE = 200 mA 1.5 2.2 1.5 2.5 VEO Emitter Output Voltage IE = 50 mA 18 17 18 17 VMin tR Rise Time VIN = 20V, 200 200 ns IE = −250 μA RC = 2k tF Fall Time RC = 2k 100 100 ns SUPPLY CHARACTERISTICS SECTION VIN Input Voltage Range After Turn-on 8 8 VMin 40 40 VMax T Thermal Shutdown Temp. (6) 160 160 °C IIN Stand By Current VIN = 40V (7) 5 10 5 10 mA (6) For operation at elevated temperatures, devices in the NFG package must be derated based on a thermal resistance of 86°C/W, junction to ambient. Devices in the D package must be derated at 125°C/W, junction to ambient. (7) Pins 1, 4, 7, 8, 11, and 14 are grounded; Pin 2 = 2V. All other inputs and outputs open. Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM2524D LM3524D |
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