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ISL29125EVAL1Z Fiches technique(PDF) 2 Page - Intersil Corporation |
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ISL29125EVAL1Z Fiches technique(HTML) 2 Page - Intersil Corporation |
2 / 17 page ISL29125 2 FN8424.2 January 24, 2014 Submit Document Feedback Block Diagram Pin Configuration ISL29125 (6 LD ODFN) TOP VIEW SCL SDA 4 6 R INTEGRATING ADC CMD Register DATA Register INTERRUPT IREF fOSC COMMAND REGISTER LIGHT DATA PROCESS 5 INT 3 GND 1 VDD I 2C/SMB RED GREEN BLUE SD A SC L VD D GN D 5 6 1 2 NC 4 3 IN T Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION 1 VDD Positive supply 2 NC No Connect 3GND Ground 4SDA I2C serial data 5INT Interrupt; LOW for interrupt alarming. INT pin is open drain. INT remains asserted until the interrupt status bit is reset. INT also become a input when it is set in SYNC mode 6SCL I2C serial clock Ordering Information PART NUMBER (Notes 1, 2, 3) TEMP RANGE (°C) PACKAGE TAPE & REEL (Pb-free) PKG. DWG. # ISL29125IROZ-T7 -40 to +85 6 Ld ODFN L6.1.65x1.65 ISL29125EVAL1Z Evaluation Board. NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see product information page for ISL29125. For more information on MSL please see tech brief TB477. |
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