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ISLA216S25IR1Z Fiches technique(PDF) 8 Page - Intersil Corporation

No de pièce ISLA216S25IR1Z
Description  16-Bit, 250/200/130 MSPS JESD204B High Speed Serial Output ADC
Download  34 Pages
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Fabricant  INTERSIL [Intersil Corporation]
Site Internet  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISLA216S25IR1Z Fiches technique(HTML) 8 Page - Intersil Corporation

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ISLA216S
8
FN7996.1
April 19, 2013
Input Capacitance
CDI
4pF
LVDS INPUTS (SYNCP, SYNCN)
Input Common Mode Range
VICM
825
1575
mV
Input Differential Swing (peak-to-peak, single-ended)
VID
250
450
mV
Input Pull-up and Pull-down Resistance
RIpu
100
kΩ
CML OUTPUTS
Output Common Mode Voltage
1.14
V
Digital Specifications Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6) UNITS
Switching Specifications Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER
SYMBOL
CONDITION
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
ADC OUTPUT
Aperture Delay
tA
190
ps
RMS Aperture Jitter
jA
100
fs
Synchronous Clock Divider Reset Recovery Time (Note 12)
tRSTRT
DLL recovery
time after
Synchronous
Reset
250
µs
Latency (ADC Pipeline Delay)
L
10
cycles
Overvoltage Recovery
tOVR
1cycles
SERDES
PLL Lock Time
295
µs
PLL Bandwidth
2.2
MHz
Added Random Jitter
5ps
RMS
Added Deterministic Jitter
7ps P-P
Maximum Input Sample Clock Total Jitter to Maintain SERDES
BER <1E-12
Integrated from
1kHz to 10MHz
offset from
carrier
5ps rms
LVDS Inputs
SYNCP, SYNCN Setup Time (with Respect to the Positive Edge of
CLKP)
tRSTS
AVDD,
OVDD = 1.7V to
1.9V, TA = -40°C
to +85°C
400
75
ps
SYNCP, SYNCN Hold Time (with respect to the positive edge of
CLKP)
tRSTH
AVDD,
OVDD = 1.7V to
1.9V, TA = -40°C
to +85°C
150
350
ps
CML Outputs
Output Rise Time
tR
165
ps
Output Fall Time
tF
145
ps
Data Output Duty Cycle
50
%
Differential Output Resistance
100


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