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GS2985 Fiches technique(PDF) 9 Page - Gennum Corporation |
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GS2985 Fiches technique(HTML) 9 Page - Gennum Corporation |
9 / 45 page GS2985 Multi-Rate SDI Reclocker with Equalization & De-emphasis Data Sheet 36663 - 5 July 2012 9 of 45 Proprietary & Confidential 56 SCK/EQ2_EN Input/Logic Input In host mode (HIF set LOW): Burst-mode clock input for SPI serial host interface. In non-host mode (HIF set HIGH): Trace equalization on/off pin for Serial Digital Differential Input 2. Active-high input. 57 SDO/EQ1_EN Input/Logic Input In host mode (HIF set LOW): Serial digital data output for SPI serial host interface. Active-high output. In non-host mode (HIF set HIGH): Trace equalization on/off pin for Serial Digital Differential Input 1. Active-high input. 58 SDI/EQ0_EN Input/Logic Input In host mode (HIF set LOW): Serial digital data input for SPI serial host interface. Active-high input. In non-host mode (HIF set HIGH): Trace equalization on/off pin for Serial Digital Differential Input 0. Active-high input. 60 VEE_CP Power Most negative power supply connection for the internal charge pump. Connect to GND. 61 VCC_CP Power Most positive power supply connection for the internal charge pump. Connect to 3.3V or 2.5V 62 LF+ Passive Loop Filter capacitor connection. (CLF = 47nF). Connect as shown in Typical Application Circuit on page 41. 63 CP_CAP Power External capacitor for internal LDO regulator supplying the charge pump circuit. − Center Pad − Ground pad on bottom of package. Connect to GND. Table 1-1: GS2985 Pin Descriptions Pin Number Name Type Description |
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