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DAC5681 Fiches technique(PDF) 6 Page - Texas Instruments

No de pièce DAC5681
Description  16-BIT, 1.0 GSPS Digital-to-Analog Converter (DAC)
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

DAC5681 Fiches technique(HTML) 6 Page - Texas Instruments

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DAC5681
SLLS864C – AUGUST 2007 – REVISED AUGUST 2012
www.ti.com
ELECTRICAL CHARACTERISTICS — DC SPECIFICATION
over operating free-air temperature range , AVDD = 3.3 V, CLKVDD = 1.8 V, IOVDD = 3.3 V, DVDD = 1.8 V, IoutFS = 20 mA
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RESOLUTION
16
Bits
DC ACCURACY(1)
INL
Integral nonlinearity
1 LSB = IOUTFS/216
±4
LSB
DNL
Differential nonlinearity
±2
ANALOG OUTPUT
Coarse gain linearity
±0.04
LSB
Offset error
Mid code offset
0.01
%FSR
Gain error
With external reference
1
%FSR
Gain error
With internal reference
0.7
%FSR
Minimum full scale output current(2)
2
mA
Maximum full scale output current(2)
20
AVDD
AVDD
V
Output Compliance range(3)
IOUTFS = 20 mA
–0.5V
+ 0.5V
Output resistance
300
k
Output capacitance
5
pF
REFERENCE OUTPUT
Vref
Reference voltage
1.14
1.2
1.26
V
Reference output current(4)
100
nA
REFERENCE INPUT
VEXTIO
Input voltage range
0.1
1.25
V
Input resistance
1
M
CONFIG6: BiasLPF_A = 0
95
Small signal bandwidth
kHz
CONFIG6: BiasLPF_A = 1
472
Input capacitance
100
pF
TEMPERATURE COEFFICIENTS
ppm of
Offset drift
±1
FSR/°C
With external reference
±15
ppm of
Gain drift
FSR/°C
With internal reference
±30
Reference voltage drift
±8
ppm/°C
POWER SUPPLY
Analog supply voltage, AVDD
3.0
3.3
3.6
V
Digital supply voltage, DVDD
1.71
1.8
2.15
V
Clock supply voltage, CLKVDD
1.71
1.8
2.15
V
I/O supply voltage, IOVDD
3.0
3.3
3.6
V
I(AVDD)
Analog supply current
67
mA
I(DVDD)
Digital supply current
191
mA
Mode 1 (below)
I(CLKVDD)
Clock supply current
15
mA
I(IOVDD)
IO supply current
4
mA
(1)
Measured differential across IOUTA1 and IOUTA2 with 25
Ω each to AVDD.
(2)
Nominal full-scale current, IoutFS, equals 16 × IBIAS current.
(3)
The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown,
resulting in reduced reliability of the DAC5681 device. The upper limit of the output compliance is determined by the load resistors and
full-scale output current. Exceeding the upper limit adversely affects distortion performance and integral nonlinearity.
(4)
Use an external buffer amplifier with high impedance input to drive any external load.
6
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Copyright © 2007–2012, Texas Instruments Incorporated
Product Folder Links: DAC5681


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