Moteur de recherche de fiches techniques de composants électroniques |
|
UC1825-SP Fiches technique(PDF) 3 Page - Texas Instruments |
|
UC1825-SP Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 18 page 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 INV NI E/A Out Clock RT CT Ramp Soft Start VREF 5.1 V VCC Out B VC Pwr Gnd Out A Gnd ILIM/SD 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 Out B VC NC Pwr Gnd Out A E/A Out Clock NC RT CT UC1825-SP www.ti.com SLUS870A – JANUARY 2009 – REVISED MARCH 2012 J PACKAGE (TOP VIEW) FK PACKAGE (TOP VIEW) TERMINAL FUNCTIONS NO. NAME I/O DESCRIPTION J FK Clock 4 5 O Output of the internal oscillator Timing capacitor connection pin for oscillator frequency programming. The timing capacitor CT 6 8 I should be connected to the device ground using minimal trace length. E/A Out 3 4 O Output of the error amplifier for compensation Gnd 10 13 - Analog ground return pin ILIM/SD 9 12 I Input to the current limit comparator and the shutdown comparator INV 1 2 I Inverting input to the error amplifier NC 1, 6, 11, 16 - No connection NI 2 3 I Non-inverting input to the error amplifier Out A 11 14 O High-current totem pole output A of the on-chip drive stage Out B 14 18 O High-current totem pole output B of the on-chip drive stage Pwr Gnd 12 15 - Ground return pin for the output driver stage Non-inverting input to the PWM comparator with 1.25-V internal input offset. In voltage Ramp 7 9 I mode operation this serves as the input voltage feed-forward function by using the CT ramp. In peak current mode operation, this serves as the slope compensation input. RT 5 7 I Timing resistor connection pin for oscillator frequency programming Soft Start 8 10 I Soft-start input pin which also doubles as the maximum duty cycle clamp Power supply pin for the output stage. This pin should be bypassed with a 0.1- μF VC 13 17 - monolithic ceramic low ESL capacitor with minimal trace lengths. Power supply pin for the device. This pin should be bypassed with a 0.1- μF monolithic VCC 15 19 - ceramic low ESL capacitor with minimal trace lengths. 5.1-V reference. For stability, the reference should be bypassed with a 0.1- μF monolithic VREF5.1 V 16 20 O ceramic low ESL capacitor and minimal trace length to the ground plane. Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): UC1825-SP |
Numéro de pièce similaire - UC1825-SP_15 |
|
Description similaire - UC1825-SP_15 |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |