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IRLR3636PBF Fiches technique(PDF) 2 Page - International Rectifier

No de pièce IRLR3636PBF
Description  High Efficiency Synchronous Rectification in SMPS
Download  10 Pages
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Fabricant  IRF [International Rectifier]
Site Internet  http://www.irf.com
Logo IRF - International Rectifier

IRLR3636PBF Fiches technique(HTML) 2 Page - International Rectifier

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IRLR/U3636PbF
2
www.irf.com
S
D
G
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
‰ Rθ is measured at TJ approximately 90°C.
Notes:
 Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 50A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.136 mH
RG = 25Ω, IAS = 50A, VGS =10V. Part not recommended for use
above this value .
„ ISD ≤ 50A, di/dt ≤ 1109 A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
60
–––
–––
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
–––
0.07
––– V/°C
–––
5.4
6.8
–––
6.6
8.3
VGS(th)
Gate Threshold Voltage
1.0
–––
2.5
V
IDSS
Drain-to-Source Leakage Current
–––
–––
20
–––
–––
250
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
RG(int)
Internal Gate Resistance
–––
0.6
–––
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
gfs
Forward Transconductance
31
–––
–––
S
Qg
Total Gate Charge
–––
33
49
Qgs
Gate-to-Source Charge
–––
11
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
15
–––
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
18
–––
td(on)
Turn-On Delay Time
–––
45
–––
tr
Rise Time
–––
216
–––
td(off)
Turn-Off Delay Time
–––
43
–––
tf
Fall Time
–––
69
–––
Ciss
Input Capacitance
–––
3779
–––
Coss
Output Capacitance
–––
332
–––
Crss
Reverse Transfer Capacitance
–––
163
–––
Coss eff. (ER) Effective Output Capacitance (Energy Related)iÖ–– 437 –––
Coss eff. (TR) Effective Output Capacitance (Time Related) h
–––
636
–––
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode)
Ãd
VSD
Diode Forward Voltage
–––
–––
1.3
V
trr
Reverse Recovery Time
–––
27
–––
TJ = 25°C
VR = 51V,
–––
32
–––
TJ = 125°C
IF = 50A
Qrr
Reverse Recovery Charge
–––
31
–––
TJ = 25°C
di/dt = 100A/µs
g
–––
43
–––
TJ = 125°C
IRRM
Reverse Recovery Current
–––
2.1
–––
A
TJ = 25°C
ton
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
VGS = -16V
showing the
VDS = 30V
Conditions
VGS = 4.5V g
VGS = 0V
VDS = 50V
ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 48V i,See Fig.11
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 5mAd
VGS = 10V, ID = 50A g
VDS = VGS, ID = 100µA
VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
ns
VGS = 0V, VDS = 0V to 48V h
MOSFET symbol
TJ = 25°C, IS = 50A, VGS = 0V g
integral reverse
p-n junction diode.
VGS = 16V
nC
µA
nA
nC
ns
RDS(on)
Static Drain-to-Source On-Resistance
pF
A
99 ™
396
–––
–––
–––
–––
VGS = 4.5V, ID = 50A g
m
ID = 50A
RG = 7.5 Ω
VGS = 4.5V g
VDD = 39V
ID = 50A, VDS =0V, VGS = 4.5V
Conditions
VDS = 25V, ID = 50A
ID = 50A


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