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M32000D3FP Datasheet(Fiches technique) 26 Page - Mitsubishi Electric Semiconductor

Numéro de pièce M32000D3FP
Description  SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER  
Télécharger  45 Pages
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Fabricant  MITSUBISHI [Mitsubishi Electric Semiconductor]
Site Internet  http://www.mitsubishichips.com
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 26 page
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SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
M32000D3FP
26
Master/slave mode
_
The M32000D3FP has an M/S (master/slave) pin for multiprocessor
configuration use.
_
• master mode (M/S = "H")
_
This is normal operation mode. Set the M/S pin to an "H" level. It is
used when the M32000D3FP is used as the main CPU in a system.
_
• slave mode (M/S = "L")
This operation mode is for when the M32000D3FP is used as a
_
coprocessor. Set the M/S pin to an "L" level. When set to slave mode,
the M32000D3FP does not start operation even after a reset, until an
interrupt request or the SBI is input. Processing is carried out by
communicating with the master M32000D3FP, using the two pro-
grammable I/O ports and the external interrupt signal.
• Coprocessor only configuration example
The slave M32000D3FP accesses only the internal DRAM and never
_
_____
the external bus. M/S and HREQ are fixed at the "L" level. The slave
M32000D3FP executes the instructions that the master M32000D3FP
downloads to the internal DRAM. The data transfer request (process-
ing complete) from the slave M32000D3FP is notified to the master
M32000D3FP by inputting the interrupt request via the programmable
I/O port. The data transaction is carried out when the master
M32000D3FP accesses the internal DRAM in the slave M32000D3FP.
• Common bus coprocessor configuration example
In this configuration, the slave M32000D3FP can also access the
external bus. Communications between the master and slave CPUs
is carried out using the programmable I/O ports and the interrupt
request input.
D24
D25
D26
D27
D28
D29
D30
D31
LM
lock control register (MLCR) < address: H'FFFF FFF7>
Fig. 26 Lock control register
M32000D3FP
(master)
ROM
ASIC
PP0
M/S
M/S
HREQ
INT
M32000D3FP
(slave)
HACK
HREQ
HACK
bus
arbiter
INT
M32000D3FP
(master)
ROM
ASIC
INT
PP0
M/S
M/S
HREQ
INT
M32000D3FP
(slave)
no access to
external bus
<coprocessor only configuration>
<common bus coprocessor configuration>
Fig. 27 Master/slave system configuration example
______
0: HREQ
exclusive
lock mode
___
1: CS exclusive
lock mode
R = 0 ... "0" when reading
R =
... read enabled
W =
... write enabled
W =
: write disabled
<at reset: H'00>
D
bit name
function
R
W
24 - 30
Not
0
assigned.
31
LM
(lock mode)
!
!




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