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M32000D3FP Datasheet(Fiches technique) 18 Page - Mitsubishi Electric Semiconductor

Numéro de pièce M32000D3FP
Description  SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER  
Télécharger  45 Pages
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Fabricant  MITSUBISHI [Mitsubishi Electric Semiconductor]
Site Internet  http://www.mitsubishichips.com
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SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
M32000D3FP
18
When the instruction cache mode is selected, the cache functions as
an instruction cache for the internal DRAM or the external memory,
and caching is carried out for instruction fetch access. This mode is
designed for use when an external ROM is used as program memory
and the internal DRAM is used as data memory, or when instructions
are located in the internal DRAM. Caching is carried out by the direct
map method. When instruction codes in the user space are overwrit-
ten by the external bus master or another source, instruction code
coherency in the cache memory is not guaranteed. Furthermore,
caching is not applied when accessing the internal DRAM from the
external bus master.
When the cache-off mode is selected, the M32000D3FP internal
memory system is configured as follows. In this mode, caching is not
applied, and all bus cycles are directly to the internal DRAM or exter-
nal bus.
external bus
(16 bits)
16
external bus
interface
M32000D3FP
128
instruction
cache
BIU
128
DRAM
CPU
128
external bus
(16 bits)
16
external bus
interface
M32000D3FP
128
DRAM
BIU
CPU
Fig. 14 Instruction cache mode
Fig. 15 Cache-off mode




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