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PD16724 Fiches technique(PDF) 7 Page - Renesas Technology Corp |
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PD16724 Fiches technique(HTML) 7 Page - Renesas Technology Corp |
7 / 26 page Data Sheet S16086EJ1V0DS 5 µµµµPD16724 (2/3) Pin Symbol Pin Name I/O Description POL Polarity input Input The relation between POL and output is as follows. Input of the POL signal is allowed the setup time (tPOL-STB) with respect to STB’s rising edge. MODE1 = H or open: When it switches such as POL = H →L or L→H, all output pins are output reset during STB = H. When it does not switch, all output pins become Hi-Z during STB = H. Refer to 7. RELATIONSHIP BETWEEN MODE, STB, SRC, ORC, POL AND OUTPUT WAVEFORM for details. MODE1 Output reset control Input MODE1 is pulled up to the VDD1 in the IC. MODE1 = H or open: During an STB = H period, output is reset between all- output pins. MODE1 = L: During an STB = H period, output is Hi-Z between all-output pins. MODE2 Slew rate control mode switching Input MODE2 is pulled down to the VSS1 in the IC. MODE2 = H: High slew rate period is controlled from the outside (SRC1 is good). MODE2 = L or open: High slew rate period is formed inside the IC (SRC2 is good). POL21, POL22 Data inversion Input Select of inversion or no inversion for input data. POL21: Data inversion or no inversion of Port1 POL22: Data inversion or no inversion of Port2 POL21, POL22 = H: Data are inverted in the IC. POL21, POL22 = L: Data are not inverted in the IC. LPC Bias current control Input LPC is pulled up to the VDD1 in the IC. LPC = H or open: VDD2 = 12.0 V to (13.0 V) normal static-current-consumption mode LPC = L: VDD2 = (13.0 V) to 15.0 V static-current-consumption cut mode V0 to V17 γ -corrected power supplies Input Input the γ -corrected power supplies from outside by using operational amplifier. During the gray-scale-voltage output, be sure to keep the gray scale level power supply at a constant level. Make sure to maintain the following relationships. VDD2 − 0.2 V ≥ V0 > V1 > V2 > ... ... > V7 > V8 ≥ 0.5 VDD2 + 0.5 V 0.5 VDD2 − 0.5 V ≥ V9 > V10 > V11 > ... ..., > V16 > V17 ≥ 0.5 VSS2 + 0.2 V or VDD2 − 0.2 V ≥ V8 > V7 > V6 > ... ... > V1 > V0 ≥ 0.5 VDD2 + 0.5 V 0.5 VDD2 − 0.5 V ≥ V17 > V16 > V15 > ... ... > V10 > V9 ≥ 0.5 VSS2 + 0.2 V Remark Hi-Z: High impedance POL S12n, S12n −3, S12n −4, S12n −7, S12n −8, S12n −11 Note S12n −1, S12n −2, S12n −5, S12n −6, S12n −9, S12n −10 Note LV0 to V8 V9 to V17 HV9 to V17 V0 to V8 Note n = 1,2, ..., 80 |
Numéro de pièce similaire - PD16724_15 |
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Description similaire - PD16724_15 |
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