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AD9927 Fiches technique(PDF) 3 Page - Analog Devices |
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AD9927 Fiches technique(HTML) 3 Page - Analog Devices |
3 / 100 page AD9927 Rev. 0 | Page 3 of 100 SPECIFICATIONS Table 1. Parameter Min Typ Max Unit TEMPERATURE RANGE Operating −25 +85 °C Storage −65 +150 °C POWER SUPPLY VOLTAGE INPUTS AVDD (AFE Analog Supply) 1.6 1.8 2.0 V TCVDD (Timing Core Supply) 1.6 1.8 2.0 V CLIVDD (CLI Input Supply) 1.6 3.0 3.6 V RGVDD (RG, HL Driver) 2.7 3.0 3.6 V HVDD (H1 to H8 Drivers) 2.7 3.0 3.6 V DVDD (Digital Logic) 1.6 1.8 2.0 V DRVDD (Parallel Data Output Drivers) 1.6 3.0 3.6 V IOVDD (Digital I/O) 2.7 3.0 3.6 V XVVDD (Vertical Output Drivers) 2.7 3.0 3.6 V CP1P8 (CP Supply Input) 1.6 1.8 2.0 V LDOIN (LDO Supply Input) 2.25 3.0 3.6 V V-DRIVER POWER SUPPLY VOLTAGES VDD1, VDD2 (V-Driver Logic) 2.7 3.0 3.6 V VH1, VH2 (V-Driver High Supply) 11.5 15.0 16.5 V VL1, VL2 (V-Driver Low Supply) −8.5 −7.5 −5.5 V VM1, VM2 (V-Driver Mid Supply) −1.5 0.0 +1.5 V VLL (SUBCK Low Supply) −8.5 −7.5 −5.5 V VMM (SUBCK Mid Supply) −4.0 0.0 +0.3 V POWER SUPPLY CURRENTS—40 MHz OPERATION AVDD (1.8 V) 27 mA TCVDD (1.8 V) 5 mA CLIVDD (3 V) 1.5 mA RGVDD (3.3 V, 20 pF RG Load, 20 pF HL Load) 10 mA HVDD1 (3.3 V, 480 pF Total Load on H1 to H8) 59 mA DVDD (1.8 V) 9.5 mA DRVDD (3 V, 10 pF Load on Each DOUT Pin) 6 mA IOVDD (3 V, Depends on Load and Output Frequency of Digital I/O) 2 mA XVVDD (3 V, Depends on Load and Output Frequency of XV Signals) 2 mA POWER SUPPLY CURRENTS—STANDBY MODE OPERATION Standby1 Mode 12 mA Standby2 Mode 5 mA Standby3 Mode 1.5 mA MAXIMUM CLOCK RATE (CLI) 40 MHz 1 The total power dissipated by the HVDD (or RGVDD) supply can be approximated using the equation Total HVDD Power = [CL × HVDD × Pixel Frequency] × HVDD Reducing the capacitive load and/or reducing the HVDD supply reduces the power dissipation. CL is the total capacitance seen by all H-outputs. |
Numéro de pièce similaire - AD9927_15 |
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Description similaire - AD9927_15 |
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