AD8517/AD8527

–10–

REV. B

DRIVING CAPACITIVE LOAD

Gain vs. Capacitive Load

Most amplifiers have difficulty driving capacitance due to degradation

of phase caused by additional phase lag from the capacitive load.

Higher capacitance at the output can increase the amount of over-

shoot and ringing in the amplifier’s step response and could even

affect the stability of the device. The value of capacitance load an

amplifier can drive before oscillation varies with gain, supply volt-

age, input signal, temperature, and frequency, among others. Unity

gain is the most challenging configuration for driving capacitance

load. However, the AD8517 offers good capacitance driving ability.

Table II shows the AD8517’s ability to capacitance load at differ-

Table II. Gain and Capacitance Load

Gain

Max Capacitance

1

400 pF

2

1.5 nF

2.5

8 nF

3

Unconditionally Stable

In-the-Loop Compensation Technique for Driving

Capacitive Loads

When driving capacitive loads in unity configuration, the in-the-

loop compensation technique is recommended to avoid oscillation

as is illustrated in Figure 22.

AD8517

1

Figure 22. In-the-Loop Compensation Technique for

Driving Capacitive Loads

Snubber Network Compensation for Driving Capacitive Loads

As load capacitance increases, the overshoot and settling time

will increase and the unity gain bandwidth of the device will

decrease. Figure 23 shows an example of the AD8517 config-

ured for unity gain and driving a 10 k

Ω resistor and a 680 pF

capacitor placed in parallel, with a square wave input set to a

frequency of 250 kHz and unity gain.

TIME – 1 s/Div

F = 250kHz

AV = +1

C = 680pF

Figure 23. Photo of a Ringing Square Wave

By connecting a series R–C from the output of the device to

ground, known as the “snubber” network, this ringing and over-

shoot can be significantly reduced. Figure 24 shows the network

setup, and Figure 25 shows the improvement of the output

response with the “snubber” network added.

5V

AD8517

Figure 24. Snubber Network Compensation for Capacitive

Loads

TIME – 1 s/Div

F = 250kHz

AV = +1

C = 680pF

Figure 25. Photo of a Square Wave with the Snubber

Network Compensation

and provides compensation for the added phase lag. The actual

values of the network resistor and capacitor have to be empiri-

cally determined. Table III shows some values of snubber network

for large capacitance load.