AD8324

Data Sheet

Rev. B | Page 2 of 16

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Logic Inputs (TTL-/CMOS-Compatible Logic)....................... 4

Timing Requirements .................................................................. 5

Absolute Maximum Ratings............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution.................................................................................. 6

Pin Configurations and Function Descriptions ........................... 7

Typical Performance Characteristics ............................................. 8

Test Circuit ...................................................................................... 11

Applications Information .............................................................. 12

General Applications.................................................................. 12

Circuit Description..................................................................... 12

Gain Programming for the AD8324........................................ 12

Input Bias, Impedance, and Termination................................ 12

Output Bias, Impedance, and Termination ............................ 12

Power Supply............................................................................... 13

Signal Integrity Layout Considerations................................... 13

Initial Power-Up ......................................................................... 13

RAMP Pin and BYP Pin Features ............................................ 13

Power Saving Features ............................................................... 14

Distortion, Adjacent Channel Power, and DOCSIS .............. 14

Utilizing Diplex Filters .............................................................. 14

Noise and DOCSIS..................................................................... 14

Differential Signal Source ......................................................... 15

Differential Signal from Single-Ended Source ....................... 15

Single-Ended Source.................................................................. 15

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 16

REVISION HISTORY

7/13—Rev. A to Rev. B

Changes to General Description Section ...................................... 1

Changes to Table 6............................................................................ 7

Added Test Circuits Section .......................................................... 11

Changed Applications Section to Applications

Information Section ....................................................................... 12

Changes to Output Bias, Impedance, and

Termination Section....................................................................... 12

Deleted Evaluation Board Features and Operation Section ..... 13

Deleted Overshoot on PC Printer Ports Section, Installing

Visual Basic Control Software Section, Running AD8324

Software Section, Figure 27; Renumbered Sequentially,

Controlling Gain/Attenuation of the AD8324 Section,

Figure 28, Transmit Enable and Sleep Mode Section, and

Memory Functions Section ........................................................... 14

Changes to Distortion, Adjacent Channel Power, and

DOCSIS Section and Noise and DOCSIS Section ..................... 14

Deleted Figure 29............................................................................ 15

Changes to Differential Signal from Single-Ended Source

Section, Single-Ended Source Section, Figure 26, and

Table 8 .............................................................................................. 15

Updated Outline Dimensions ....................................................... 16

Changes to Ordering Guide .......................................................... 16

7/05—Rev. 0 to Rev. A

Updated Absolute Maximum Ratings Page ...................................5

Updated Outline Dimensions....................................................... 16

Changes to Ordering Guide .......................................................... 16

10/03—Revision 0: Initial Version