CDP1821C datasheet(6/7 Pages) INTERSIL

No de pièce	CDP1821C

Description	High-Reliability CMOS 1024-Word x 1-Bit Static RAM

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Fabricant	INTERSIL [Intersil Corporation]

Site Internet	http://www.intersil.com/cda/home

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6-10

Data Retention Speciﬁcations

PARAMETER

SYMBOL

TEST CONDITIONS

-55oC, +25oC

+125oC

UNITS

VDR

(V)

VDD

(V)

MIN

MAX

MIN

MAX

Minimum Data Retention Voltage

(Note 1)

VDD

-

2

-

2.5

V

Data Retention Quiescent Current

(Note 1)

IDD

2

-

50

-

200

µA

Chip Deselect to Data Retention Time

tCDR

-

5

450

-

650

-

ns

Recovery to Normal Operation Time

tRC

-

5

450

-

650

-

ns

NOTE:

1. 100% testing. All other limits are designer’s parameters under given test conditions and do not represent 100% testing

FIGURE 3. LOW VDD DATA RETENTION WAVEFORMS AND TIMING DIAGRAM

Burn-In Circuit

FIGURE 4. DYNAMIC/OPERATING BURN-IN CIRCUIT AND TIMING DIAGRAM

VDD

VDR

0.95 VDD

tCDR

VIH

VIL

VIH

VIL

CS

tF

tR

tRC

DATA RETENTION MODE

PACKAGE

VDD

TEMPERATURE

DURATION

D

7V

+125oC

160 Hrs.

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

A11

A0

A1

A2

A3

A4

RI

VDD/2

VDD

O1

A9

A8

A7

A6

A5

A10

R

0

1.6

2.2

5.0

6.6

7.2

10.0

O1

A0

A1

0

VDD

0

VDD

0

µs

A1 - A11 ARE DIVISION BY 2 BASED ON A0

R = 8.2k

Ω 20%

RI = 2kΩ 20%

CDP1821C/3

Numéro de pièce similaire - CDP1821C

Fabricant	No de pièce	Fiches technique	Description
Intersil Corporation	CDP1822	45Kb / 8P	256-Word x 4-Bit LSI Static RAM March 1997
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