Moteur de recherche de fiches techniques de composants électroniques |
|
CD4096BMS Fiches technique(PDF) 8 Page - Intersil Corporation |
|
CD4096BMS Fiches technique(HTML) 8 Page - Intersil Corporation |
8 / 10 page 7-1101 CD4095BMS, CD4096BMS FIGURE 2. PROPAGATION DELAY, TRANSITION, AND SETUP TIME WAVEFORMS FIGURE 3. CLOCK PULSE RISE AND FALL TIME WAVEFORMS FIGURE 4. CD4095BMS CONNECTED IN TOGGLE MODE FIGURE 5. CD4096BMS CONNECTED AS A “D” TYPE FLIP-FLOP FIGURE 6. SYNCHRONOUS BINARY DIVIDE-BY-TEN COUNTER VDD 90% 50% 10% 50% VDD 90% 50% 10% trCL tfCL tSLH tTHL tSHL tTLH CLOCK * INPUT J OR K GATE INPUTS Q OR Q OUTPUT tPLH tPHL 0 0 0 tWL VDD 90% 50% 10% trCL tfCL CLOCK tWH tWL + tWH = I fCL 0 13 3 5 4 11 9 10 12 S J Q CL K R Q 2 VSS VSS VDD CLOCK 13 3 5 4 11 9 10 12 CLOCK S J Q CL K R Q 2 VSS VSS VDD VSS D 3 4 5 J CL K Q Q 12 8 6 CD4095BMS 10 11 0 1 234567890 1 STATE CLOCK QA QB QC QD 3 4 5 J CL K Q Q 12 8 CD4095BMS 10 11 QC QD 9 9 QB 3 4 5 J CL K Q Q 12 8 CD4095BMS 10 11 9 QA 3 4 5 J CL K Q Q 12 8 CD4095BMS 10 11 9 VDD CLOCK INPUT STATE QAQBQCQD 0 1 2 3 4 5 6 7 8 9 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 NOTE: PINS 2 & 13 RESET & SET, GO TO VSS ON ALL UNITS |
Numéro de pièce similaire - CD4096BMS |
|
Description similaire - CD4096BMS |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |