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74LVC1G11GN Fiches technique(PDF) 2 Page - NXP Semiconductors |
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74LVC1G11GN Fiches technique(HTML) 2 Page - NXP Semiconductors |
2 / 17 page 74LVC1G11 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 7 — 4 July 2012 2 of 17 NXP Semiconductors 74LVC1G11 Single 3-input AND gate 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G11GW 40 C to +125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74LVC1G11GV 40 C to +125 C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457 74LVC1G11GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm SOT886 74LVC1G11GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1 0.5 mm SOT891 74LVC1G11GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9 1.0 0.35 mm SOT1115 74LVC1G11GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0 1.0 0.35 mm SOT1202 Table 2. Marking Type number Marking code[1] 74LVC1G11GW VU 74LVC1G11GV V11 74LVC1G11GM VU 74LVC1G11GF VU 74LVC1G11GN VU 74LVC1G11GS VU Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 001aac033 A B C 1 3 4 Y 6 001aac029 & 4 1 3 6 001aac030 A B C Y |
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