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STA120 Fiches technique(PDF) 2 Page - STMicroelectronics

No de pièce STA120
Description  DIGITAL AUDIO INTERFACE RECEIVER
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA120 Fiches technique(HTML) 2 Page - STMicroelectronics

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STA120
2/15
ABSOLUTE MAXIMUM RATINGS
PIN CONNECTIONS (Top view)
Symbol
Parameter
Value
Unit
VD+, VA+
Power Supply Voltage
4
V
VIN
Input Voltage ( excluding pins 9, 10)
-0.3 to VD+ +0.3
V
Tamb
Ambient Operating Temperature (power applied)
-30 to +85
°C
Tstg
Storage Temperature
-40 to 150
°C
PINS DESCRIPTION
N.
Name
Description
Power Supply
7VD+
Positive Digital Power.Positive supply for the digital section. Nominally 3.3V.
8
DGND
Digital Ground.Ground for the digital section.
21
AGND
Analog Ground.Ground for the analog section. AGND should be connected to same ground as
DGND.
22
VA+
Positive Analog Power.Positive supply for the analog section. Nominally 3.3V.
Audio Output Interface
11
FSYNC
Frame Sync.Delineates the serial data and may indicate the particular channel, left or right and
may be an input or output. The format is based on M0, M1, M2 and M3 pins.
12
SCK
Serial Clock.Serial clock for SDATA pin which can be configured (via the M0, M1, M2 and M3
pins) as an input or output and can sample data on the rising or falling edge. As an output, SCK
will generate 32 clocks for every audio sample. As an input, 32 SCK periods per audio sample
must be provided in all normal modes.
17, 18,
23, 24
M2, M3,
M1, M0
Serial Port Mode Selects.Selects the format of Fsync and the sample edge of SCK with respect
to SDATA.
26
SDATA
Serial Data. Audio data serial output pin.
C0/E0
VD+
DGND
RXP
RXN
SCK
FSYNC
CS12/FCK
U
1
3
2
4
5
6
7
8
9
CBL
SEL
M3
MCK
M2
FILT
AGND
VA+
M0
23
22
21
20
19
17
18
16
15
D97AU609A
10
11
12
13
14
28
27
26
25
24
C
Cd/F1
Cc/F0
Cb/E2
Ca/E1
M1
ERF
SDATA
Ce/F2
VERF


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