PTN3381DBS datasheet(10/30 Pages) PHILIPS

No de pièce	PTN3381DBS

Description	Enhanced performance HDMI/DVI level shifter with voltage regulator, dongle detection and supporting 3 Gbit/s operation

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Fabricant	PHILIPS [NXP Semiconductors]

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PTN3381D

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Product data sheet

Rev. 2 — 26 July 2012

10 of 30

NXP Semiconductors

PTN3381D

Fully integrated HDMI/DVI level shifter supporting 3 Gbit/s operation

7.1 Enable and disable features

PTN3381D offers different ways to enable or disable functionality, using the Output

Enable (OE_N), and DDC Enable (DDC_EN) inputs. Whenever the PTN3381D is

disabled, the device will be in standby mode and power consumption will be minimal;

otherwise the PTN3381D will be in active mode and power consumption will be nominal.

These two inputs each affect the operation of PTN3381D differently: OE_N controls the

TMDS channels, DDC_EN affects only the DDC channel, and HPD_SINK does not affect

either of the channels. The following sections and truth table describe their detailed

operation.

7.1.1 Hot plug detect

The HPD channel of PTN3381D functions as a level-shifting buffer to pass the HPD logic

signal from the display sink device (via input HPD_SINK) on to the display source device

(via output HPD_SOURCE).

The output logic state of HPD_SOURCE output always follows the logic state of input

HPD_SINK, regardless of whether the device is in active or standby mode.

7.1.2 Output Enable function (OE_N)

When input OE_N is asserted (active LOW), the IN_Dx and OUT_Dx signals are fully

functional. Input termination resistors are enabled and the internal bias circuits are turned

on.

When OE_N is de-asserted (inactive HIGH), the OUT_Dx outputs are in a

high-impedance state and drive zero output current. The IN_Dx input buffers are disabled

and IN_Dx termination is disabled. Power consumption is minimized.

Remark: Note that OE_N signal level has no influence on the HPD_SINK input,

HPD_SOURCE output, or the SCL and SDA level shifters. A transition from HIGH to LOW

at OE_N may disable the DDC channel for up to 20

s.

7.1.3 DDC channel enable function (DDC_EN)

The DDC_EN pin is active HIGH and can be used to isolate a badly behaved slave. When

DDC_EN is LOW, the DDC channel is turned off. The DDC_EN input should never

change state during an I2C-bus operation. Note that disabling DDC_EN during a bus

operation may hang the bus, while enabling DDC_EN during bus traffic would corrupt the

I2C-bus operation. Hence, DDC_EN should only be toggled while the bus is idle. (See

I2C-bus specification).

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NXP Semiconductors	PTN3381DBS	264Kb / 30P	Enhanced performance HDMI/DVI level shifter with voltage regulator, dongle detection and supporting 3 Gbit/s operation Rev. 2-26 July 2012

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Description similaire - PTN3381DBS

Fabricant	No de pièce	Fiches technique	Description
NXP Semiconductors	PTN3381D	264Kb / 30P	Enhanced performance HDMI/DVI level shifter with voltage regulator, dongle detection and supporting 3 Gbit/s operation Rev. 2-26 July 2012
	PTN3360D	192Kb / 24P	Enhanced performance HDMI/DVI level shifter with active DDC buffer, supporting 3 Gbit/s operation Rev. 4-29 June 2012
	PTN3361C	436Kb / 30P	Enhanced performance HDMI/DVI level shifter with active DDC buffer, supporting 1.65 Gbit/s operation Rev. 1.1-28 July 2015
	PTN3381B	649Kb / 30P	Enhanced performance HDMI/DVI level shifter with voltage regulator, dongle detect support and active DDC buffer Rev. 2-15 October 2010
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	PTN3360A	395Kb / 21P	Enhanced performance HDMI/DVI level shifter with inverting HPD Rev. 02-8 October 2009
	PTN3361B	155Kb / 29P	HDMI/DVI level shifter with dongle detect support and active DDC buffer Rev. 02-7 October 2009
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