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ADC10321 Fiches technique(PDF) 4 Page - Texas Instruments

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No de pièce ADC10321
Description  10-Bit, 20MSPS, 98mW A/D Converter with Internal Sample and Hold
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

ADC10321 Fiches technique(HTML) 4 Page - Texas Instruments

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ADC10321
SNAS028F – JUNE 2000 – REVISED MAY 2013
www.ti.com
PIN DESCRIPTIONS AND EQUIVALENT CIRCUITS (continued)
Pin
Description
No.
Symbol
Equivalent Circuit
Power Down input. When this pin is high, the converter is in
8
PD
the Power Down mode and the data output pins are in a high
impedance state.
Output Enable pin. When this pin and the PD pin are low, the
26
OE
output data pins are active. When this pin or the PD pin is
high, the output data pins are in a high impedance state.
14 thru
19
Digital Output pins providing the 10 bit conversion results.
and
D0 -D9
D0 is the LSB, D9 is the MSB. Valid data is present just after
22 thru
the falling edge of the CLK input.
25
Positive analog supply pins. These pins should be connected
to a clean, quiet voltage source of +5V. VA and VD should
3, 7, 28
VA
have a common supply and be separately bypassed with
10µF to 50µF capacitors in parallel with 0.1µF capacitors.
Positive digital supply pins. These pins should be connected
to a clean, quiet voltage source of +5V. VA and VD should
5, 10
VD
have a common supply and be separately bypassed with
10µF to 50µF capacitors in parallel with 0.1µF capacitors.
Positive supply pins for the digital output drivers. These pins
12, 21
VD I/O
should be connected to a clean, quiet voltage source of +3V
to +5V and be separately bypassed with 10µF capacitors.
The ground return for the analog supply. AGND and DGND
4, 27,
AGND
should be connected together close to the ADC10321
29
package.
The ground return for the digital supply. AGND and DGND
6, 11
DGND
should be connected together close to the ADC10321
pacjage.
13, 20
DGND I/O
The ground return of the digital output drivers.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
4
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