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ADC12048CIVF Fiches technique(PDF) 7 Page - Texas Instruments |
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ADC12048CIVF Fiches technique(HTML) 7 Page - Texas Instruments |
7 / 37 page ADC12048 www.ti.com SNAS105B – APRIL 2000 – REVISED MARCH 2013 Reference Inputs The following specifications apply to the ADC12048 for VA+ = VD+ = 5V, VREF+ = 4.096V, VREF− = 0.0V, 12-bit + sign conversion mode, fCLK = 12.0 MHz, RS = 25Ω, source impedance for VREF+ and VREF− ≤ 1Ω, fully differential input with fixed 2.048V common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C Unit Symbol Parameter Conditions Typical(1) Limits(2) (Limit) IREF Reference Input Current VREF+ 4.096V, VREF− = 0V Analog Input Signal: 1 kHz(3) 145 μA 80 kHz 136 μA CREF Reference Input Capacitance 85 pF (1) Typicals are at TA = 25°C and represent most likely parametric norm. (2) Limits are ensured to AOQL (Average Outgoing Quality Level). (3) The reference input current is a DC average current drawn by the reference input with a full-scale sinewave input. The ADC12048 is continuously converting with a throughput rate of 206 kHz. Digital Logic Input/Output Characteristics The following specifications apply to the ADC12048 for VA+ = VD+ = 5V, VREF+ = 4.096V, VREF− = 0.0V, 12-bit + sign conversion mode, fCLK = 12.0 MHz, RS = 25Ω, source impedance for VREF+ and VREF− ≤ 1Ω, fully differential input with fixed 2.048V common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C Unit Symbol Parameter Conditions Typical(1) Limits (2) (Limit) VIH Logic High Input Voltage VA+ = VD+ = 5.5V 2.0 V (min) VIL Logic Low Input Voltage VA+ = VD+ = 4.5V 0.8 V (max) IIH Logic High Input Current VIN = 5V 0.035 2.0 μA (max) IIL Logic Low Input Current VIN = 0V −0.035 −2.0 μA (max) VOH Logic High Output Voltage VA+ = VD+ = 4.5V IOUT = −1.6 mA 2.4 V (min) VOL Logic Low Output Voltage VA+ = VD+ = 4.5V IOUT = 1.6 mA 0.4 V (max) IOFF TRI-STATE Output Leakage VOUT = 0V ±2.0 μA (max) Current VOUT = 5V CIN D12–D0 Input Capacitance 10 pF (1) Typicals are at TA = 25°C and represent most likely parametric norm. (2) Limits are ensured to AOQL (Average Outgoing Quality Level). Converter AC Characteristics The following specifications apply to the ADC12048 for VS+ = VD+ = 5V, VREF+ = 4.096V, VREF− = 0.0V, 12-bit + sign conversion mode, fCLK = 12.0 MHz, RS = 25Ω, source impedance for VREF+ and VREF− ≤ 1Ω, fully differential input with fixed 2.048V common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C Unit Symbol Parameter Conditions Typical(1) Limits(2) (Limit) tZ Auto Zero Time 78 78 clks + 120 ns clks (max) tCAL Full Calibration Time 4946 4946 clks + 120 ns clks (max) 50 % CLK Duty Cycle 40 % (min) 60 % (max) tCONV Conversion Time Sync-Out Mode 44 44 clks (max) tAcqSYNCOUT Minimum for 13 Bits 9 9 clks + 120 ns clks (max) Acquisition Time (Programmable) Maximum for 13 Bits 79 79 clks + 120 ns clks (max) (1) Typicals are at TA = 25°C and represent most likely parametric norm. (2) Limits are ensured to AOQL (Average Outgoing Quality Level). Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: ADC12048 |
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