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TLC4541 Fiches technique(PDF) 1 Page - Texas Instruments

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No de pièce TLC4541
Description  5-V LOW POWER, 16-BIT, 200-KSPS SEREAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO-POWER DOWN
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

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TLC4541, TLC4545
SLAS293 − DECEMBER 2001
5V, LOW POWER, 16BIT, 200KSPS
SERIAL ANALOGTODIGITAL CONVERTERS WITH AUTOPOWER DOWN
1
www.ti.com
FEATURES
D 200-KSPS Sampling Rate
D Built-In Conversion Clock
D INL: ±2.5 LSB Max,
DNL: 2 to −1 LSB Max
D SINAD = 84.5 dB, SFDR = 95 dB,
THD = 94 dB at 15 kHz fin, 200 KSPS
D SPI/DSP-Compatible Serial Interfaces With
SCLK Input up to 15 MHz
D Single 5-V Supply
D Rail-to-Rail Analog Input With 500 kHz BW
D Two Input Options Available:
− TLC4541 − Single Channel Input
− TLC4545 − Single Channel,
Pseudo-differential Input
D (TLC4541) Optimized DSP Interface −
Requires FS Input Only
D Low Power With Auto-Power Down
− Operating Current: 3.5 mA
− Auto-Power Down Current: 5
µA
D Pin Compatible 12/14/16-Bit Family in 8-Pin
SOIC and MSOP Packages
APPLICATIONS
D ATE System
D Industrial Process Control
D Measurement
D Motor Control
DESCRIPTION
The TLC4541 and TLC4545 are a family of high
performance, 16-bit, low power, miniature CMOS
analog-to-digital converters (ADCs). These devices
operate from a single 5-V supply. Devices are available
with single, dual, or single pseudo-differential inputs. All
of these devices have a chip select (CS), serial clock
(SCLK), and serial data output (SDO) that provides a
direct 3-wire interface to the serial port of most popular
host microprocessors (SPI interface). When interfaced
with a DSP, a frame sync signal (FS) is used to indicate
the start of a serial data frame on either pin 1 (CS) or pin
7 (FS) for the TLC4541. The TLC4545 ADC connects
to the DSP via pin 1 only (CS).
The TLC4541 and TLC4545 are designed to operate
with low power consumption. The power saving feature
is further enhanced with an auto-power down mode.
This product family features a high-speed serial link to
modern host processors with an external SCLK up to
15 MHz. Both families use a built-in oscillator as the
conversion clock, providing a 2.94
µs maximum
conversion time.
SDO
FS
VDD
SCLK
8
7
6
5
1
2
3
4
CS
REF
GND
AIN
TLC4541
D OR DGK Package
(TOP VIEW)
SDO
SCLK
VDD
AIN(−)
8
7
6
5
1
2
3
4
CS
REF
GND
AIN(+)
TLC4545
D OR DGK Package
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
 2001, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.


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