Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

TSB41LV03A Fiches technique(PDF) 2 Page - Texas Instruments

No de pièce TSB41LV03A
Description  IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITER
Download  11 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TSB41LV03A Fiches technique(HTML) 2 Page - Texas Instruments

  TSB41LV03A_14 Datasheet HTML 1Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 2Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 3Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 4Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 5Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 6Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 7Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 8Page - Texas Instruments TSB41LV03A_14 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 11 page
background image
www.ti.com
Not Recommended for New Designs
TSB41LV03A
TSB41LV03AI
SLLA225 – JUNE 2006
The TSB41LV03A requires only an external 24.576 MHz crystal as a reference. An external clock may be
provided instead of a crystal. An internal oscillator drives an internal phase-locked loop (PLL), which generates
the required 393.216 MHz reference signal. This reference signal is internally divided to provide the clock
signals used to control transmission of the outbound encoded strobe and data information. A 49.152 MHz clock
signal is supplied to the associated LLC for synchronization of the two chips and is used for resynchronization of
the received data. The power-down (PD) function, when enabled by asserting the PD terminal high, stops
operation of the PLL.
The TSB41LV03A supports an optional isolation barrier between itself and its LLC. When the ISO input terminal
is tied high, the LLC interface outputs behave normally. When the ISO terminal is tied low, internal differentiating
logic is enabled, and the outputs are driven such that they can be coupled through a capacitive or transformer
galvanic isolation barrier as described in Annex J of IEEE Std 1394-1995 and in the P1394a Supplement section
5.9.4) (hereafter referred to as Annex J type isolation). To operate with TI bus holder isolation, the ISO terminal
on the PHY must be high.
Data bits to be transmitted through the cable ports are received from the LLC on two, four, or eight parallel paths
(depending on the requested transmission speed). They are latched internally in the TSB41LV03A in
synchronization with the 49.152-MHz system clock. These bits are combined serially, encoded, and transmitted
at 98.304, 196.608, or 392.216 Mbits/s (referred to as S100, S200, and S400 speed respectively) as the
outbound data-strobe information stream. During transmission, the encoded data information is transmitted
differentially on the TPB cable pair(s), and the encoded strobe information is transmitted differentially on the
TPA cable pair(s).
During packet reception the TPA and TPB transmitters of the receiving cable port are disabled, and the
receivers for that port are enabled. The encoded data information is received on the TPA cable pair, and the
encoded strobe information is received on the TPB cable pair. The received data-strobe information is decoded
to recover the receive clock signal and the serial data bits. The serial data bits are split into two-, four-, or
eight-bit parallel streams (depending upon the indicated receive speed), resynchronized to the local 49.152-MHz
system clock and sent to the associated LLC. The received data is also transmitted (repeated) on the other
active (connected) cable ports.
Both the TPA and TPB cable interfaces incorporate differential comparators to monitor the line states during
initialization and arbitration. The outputs of these comparators are used by the internal logic to determine the
arbitration status. The TPA channel monitors the incoming cable common-mode voltage. The value of this
common-mode voltage is used during arbitration to set the speed of the next packet transmission. In addition,
the TPB channel monitors the incoming cable common-mode voltage on the TPB pair for the presence of the
remotely supplied twisted-pair bias voltage.
The TSB41LV03A provides a 1.86-V nominal bias voltage at the TPBIAS terminal for port termination. The PHY
contains three independent TPBIAS circuits. This bias voltage, when seen through a cable by a remote receiver,
indicates the presence of an active connection. This bias voltage source must be stabilized by an external filter
capacitor of 1
µF.
The line drivers in the TSB41LV03A, operating in a high-impedance current mode, are designed to work with
external 112-
Ω line-termination resistor networks in order to match the 110-Ω cable impedance. One network is
provided at each end of a twisted-pair cable. Each network is composed of a pair of series-connected 56-
resistors. The midpoint of the pair of resistors that is directly connected to the twisted-pair A terminals is
connected to its corresponding TPBIAS voltage terminal. The midpoint of the pair of resistors that is directly
connected to the twisted-pair B terminals is coupled to ground through a parallel R-C network with
recommended values of 5 k
Ω and 220 pF. The values of the external line-termination resistors are designed to
meet the standard specifications when connected in parallel with the internal receiver circuits. An external
resistor connected between the R0 and R1 terminals sets the driver output current, along with other internal
operating currents. This current setting resistor has a value of 6.3 k
Ω± 1%. This may be accomplished by
placing a 6.34-k
Ω± 1% resistor in parallel with a 1-MΩ resistor.
When the power supply of the TSB41LV03A is off while the twisted-pair cables are connected, the TSB41LV03A
transmitter and receiver circuitry presents a high-impedance signal to the cable and does not load the TPBIAS
voltage at the other end of the cable.
2
Submit Documentation Feedback


Numéro de pièce similaire - TSB41LV03A_14

FabricantNo de pièceFiches techniqueDescription
logo
Texas Instruments
TSB41LV03AI TI-TSB41LV03AI Datasheet
638Kb / 50P
[Old version datasheet]   IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITER
TSB41LV03AIPFP TI-TSB41LV03AIPFP Datasheet
638Kb / 50P
[Old version datasheet]   IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITER
TSB41LV03APFP TI-TSB41LV03APFP Datasheet
638Kb / 50P
[Old version datasheet]   IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITER
More results

Description similaire - TSB41LV03A_14

FabricantNo de pièceFiches techniqueDescription
logo
Texas Instruments
TSB41LV03A TI-TSB41LV03A Datasheet
638Kb / 50P
[Old version datasheet]   IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITER
TSB41AB3 TI-TSB41AB3 Datasheet
747Kb / 52P
[Old version datasheet]   IEEE 1394A-2000 THREE-PORT CABLE TRANSCEIVER / ARBITER
TSB41AB3-EP TI1-TSB41AB3-EP_16 Datasheet
808Kb / 55P
[Old version datasheet]   IEEE 1394a-2000 THREE-PORT CABLE TRANSCEIVER/ARBITER
TSB41AB3-EP TI-TSB41AB3-EP Datasheet
729Kb / 52P
[Old version datasheet]   IEEE 1394A-2000 THREE-PORT CABLE TRANSCEIVER/ARBITER
TSB41LV01 TI-TSB41LV01 Datasheet
615Kb / 49P
[Old version datasheet]   IEEE 1394A ONE-PORT CABLE TRANSCEIVER/ARBITER
TSB41LV04A TI-TSB41LV04A Datasheet
625Kb / 49P
[Old version datasheet]   IEEE 1394a FOUR-PORT CABLE TRANSCEIVER/ARBITER
TSB41LV06 TI-TSB41LV06 Datasheet
500Kb / 39P
[Old version datasheet]   IEEE 1394a SIX-PORT CABLE TRANSCEIVER/ARBITER
TSB41LV06A TI-TSB41LV06A Datasheet
617Kb / 48P
[Old version datasheet]   IEEE 1394a SIX-PORT CABLE TRANSCEIVER/ARBITER
TSB41LV02A TI-TSB41LV02A Datasheet
630Kb / 50P
[Old version datasheet]   IEEE 1394a TWO PORT CABLE TRANSCEIVER/ARBITER
logo
Agere Systems
FW803 AGERE-FW803 Datasheet
395Kb / 24P
   PHY IEEE 1394A Three-Cable Transceiver/Arbiter Device
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com