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TPD12S521 Fiches technique(PDF) 1 Page - Texas Instruments |
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TPD12S521 Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 12 page 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 5V_SUPPLY LV_SUPPLY GND TMDS_D2+ TMDS_GND TMDS_D2– TMDS_D1+ TMDS_GND TMDS_D1– TMDS_D0+ TMDS_GND TMDS_D0– TMDS_CK+ TMDS_GND TMDS_CK– CE_REMOTE_IN DDC_CLK_IN DDC_DAT_IN HOTPLUG_DET_IN 5V_OUT ESD_BYP GND TMDS_D2+ TMDS_GND TMDS_D2– TMDS_D1+ TMDS_GND TMDS_D1– TMDS_D0+ TMDS_GND TMDS_D0– TMDS_CK+ TMDS_GND TMDS_CK– CE_REMOTE_OUT DDC_CLK_OUT DDC_DAT_OUT HOTPLUG_DET_OUT DBT PACKAGE (TOP VIEW) TPD12S521 www.ti.com SLVS639C – OCTOBER 2007 – REVISED JANUARY 2013 SINGLE-CHIP HDMI TRANSMITTER PORT PROTECTION AND INTERFACE DEVICE Check for Samples: TPD12S521 1 FEATURES APPLICATIONS • Single-Chip ESD Solution for High-Definition • PCs Multimedia Interface (HDMI) Driver • Consumer Electronics • Supports HDMI 1.3 and HDMI 1.4 Data Rates • Set-Top Boxes (–3 dB Frequency > 3 GHz) • DVDRW Players • 0.8-pF Capacitance for High-Speed Transition Minimized Differential Signaling (TMDS) Lines • 0.05-pF Matching Capacitance Between the Differential Signal Pair • Integrated Level Shifting for the Control Lines • ±8-kV Contact ESD Protection on External Lines • 38-Pin Thin Shrink Small-Outline Package (TSSOP) Provides Seamless Layout Option With HDMI Connector • Backdrive Protection – TMDS_D[2:0]+/– – TMDS_CK+/– – CE_REMOTE_OUT – DDC_DAT_OUT – DDC_CLK_OUT – HOTPLUG_DET_OUT • Lead-Free Package • On-Chip Current Regulator With 55-mA Current Output DESCRIPTION The TPD12S521 is a single-chip ESD solution for the high-definition multimedia interface (HDMI) transmitter port. In many cases, the core ICs, such as the scalar chipset, may not have robust ESD cells to sustain system-level ESD strikes. In these cases, the TPD12S521 provides the desired system-level ESD protection, such as the the IEC61000-4-2 (Level 4) ESD, by absorbing the energy associated with the ESD strike. While providing the ESD protection, the TPD12S521 adds little or no additional glitch in the high-speed differential signals (see Figure 6 and Figure 7). The high-speed transition minimized differential signaling (TMDS) lines add only 0.9-pF capacitance to the lines. In addition, the monolithic integrated circuit technology ensures that there is excellent matching between the two-signal pair of the differential line. This is a direct advantage over discrete ESD clamp solutions where variations between two different ESD clamps may significantly degrade the differential signal quality. The low-speed control lines offer voltage-level shifting to eliminate the need for an external voltage level-shifter IC. The control line ESD clamps add 3.5-pF capacitance to the control lines. The 38-pin DBT package offers seamless layout routing option to eliminate the routing glitch for the differential signal pair. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2007–2013, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Numéro de pièce similaire - TPD12S521_14 |
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Description similaire - TPD12S521_14 |
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