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UC2849DW Fiches technique(PDF) 2 Page - Texas Instruments |
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UC2849DW Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 21 page www.ti.com DESCRIPTION (cont.) CONNECTION DIAGRAMS DIL-24, SOIC-24 (TopView) NandDWPackages QPackage PLCC-28(TopView) ABSOLUTE MAXIMUM RATINGS (1) RECOMMENDED OPERATING CONDITIONS UC2849 UC3849 SLUS360C – JULY 1995 – REVISED AUGUST 2007 The UC3849 features load share, oscillator synchronization, undervoltage lockout, and programmable output control. Multiple chip operation can be achieved by connecting up to ten UC3849 chips in parallel. The SHARE bus and CLKSYN bus provide load sharing and synchronization to the fastest oscillator respectively. The UC3849 is an ideal controller to achieve high power, secondary side average current mode control. VALUE UNIT Supply Voltage (VCC) 20 V Output current source or sink 0.3 A Analog input voltages –0.3 to 7 V ILIM, KILL, SEQ, ENBL, RUN –0.3 to 7 CLKSYN current source 12 RUN current sink 15 mA SEQ current sink 20 RDEAD current sink 20 Share bus voltage (voltage with respect to GND) 0 to 6.2 ADJ voltage (voltage with respect to GND) 0.9to 6.3 V VVEE (voltage with respect to GND) –1.5 Storage temperaturee –65 to 150 Junction temperature –65 to 150 °C Lead temperature (soldering, 10 sec.) 300 (1) All voltages with respect to VEE except where noted; all currents are positive into, negative out of the specified terminal. MIN MAX UNIT Input voltage 8 20 V Sink/source output current 250 mA 2 Submit Documentation Feedback |
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