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UC2849DW Fiches technique(PDF) 11 Page - Texas Instruments |
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UC2849DW Fiches technique(HTML) 11 Page - Texas Instruments |
11 / 21 page www.ti.com VSP * VSM + VREF * VADJ R ADJ R1 ) RADJ ) VADJ (4) VSM + 0 V, VADJ + 1 V(master), VREF + 5 V (5) VSP + 4 R ADJ R1 ) RADJ ) 1 V (6) Phase AVO qm=50º 200 160 120 80 40 0 10 100 1k 10k 100k 1M 10M 100M f-Frequency-Hz Startup and Shutdown UC2849 UC3849 SLUS360C – JULY 1995 – REVISED AUGUST 2007 The ADJ pin voltage on the slave chips will increase forcing their load currents to increase to match the master. The ac frequency response of the voltage error amplifier is shown in Figure 7. Figure 7. AC Frequency Response of the Voltage Error Amplifier Isolated power up can be accomplished using the UCC1889. Application Note U-149 is available for additional information. The UC3849 offers several features that enhance startup and shutdown. Soft start is accomplished by connecting RUN to VA+ and a capacitor to ground. The resulting RC rise time on the VA+ pin initiates a soft start. It can also be accomplished by connecting RUN to ILIM. When RUN is low it commands zero load current, assuring a soft start. The undervoltage lockout (UVLO) is a logical AND of ENBL < 2.5 V, SEQ > 2.5 V, VCC > 8.4 V and VREF > 4.65 V. The block diagram shows that the thresholds are set by comparators. By placing an RC divider on the SEQ pin, the enabling of multiple chips can be sequenced with different RC time constants. Similarly, different RC time constants on the ENBL pins can sequence shutdown. The UVLO keeps the output from switching; however the internal reference starts up with VCC less than 8.4 V. The KILL input shuts down the switching of the chip. This can be used in conjunction with an overvoltage comparator for overvoltage protection. In order to restart the chip after KILL has been initiated, the chip must be powered down and then back up. A pulse on the ENBL pin also accomplishes this without actually removing voltage to the VCC pin. 11 Submit Documentation Feedback |
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