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UC2849DW Fiches technique(PDF) 7 Page - Texas Instruments |
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UC2849DW Fiches technique(HTML) 7 Page - Texas Instruments |
7 / 21 page www.ti.com VREF 2 R T (3) UC2849 UC3849 SLUS360C – JULY 1995 – REVISED AUGUST 2007 RDEAD: The pin that programs the maximum duty cycle by connecting a resistor between it and OSC. The maximum duty cycle is decreased by increasing this resistor value which increases the discharge time. The dead time, the time when the output is low, is 2 • RDEAD • C T. The CT capacitance should be increased by approximately 40 pF to account for parasitic capacitance. RT: This pin programs the charge time of the oscillator ramp. The charge current is The charge time is approximately TCHARGE ≈ RT • CT when the RDEAD resistor is used. The dead time is approximately TDISCHARGE ≈ 2 • RDEAD • CT. RUN: This is an open collector logic output that signifies when the chip is operational. RUN is pulled high to VREF through an external resistor when VCC is greater than 8.4 V, VREF is greater than 4.65 V, SEQ is greater than 2.5 V, and KILL lower than 3.0 V. RUN connected to the VA+ pin and to a capacitor to ground adds an RC rise time on the VA+ pin initiating a soft start. SEQ: The sequence pin allows the sequencing of startup for multiple units. A resistor between VREF and SEQ and a capacitor between SEQ and GND creates a unique RC rise time for each unit which sequences the output startup. SHARE: The nearly dc voltage representing the average output current. This pin is wired directly to all SHARE pins and is the load share bus. VA+, VA–: The inverting and non-inverting inputs to the voltage error amplifier. VAO: The output of the voltage error amplifier. Its Voh is clamped with the ILIM pin. VCC: The input voltage of the chip. The chip is operational between 8.4 V and 20 V. VEE: The negative supply to the chip which powers the lower voltage rail for all amplifiers. The chip is operational if VEE is connected to GND or if GND is floating. When voltage is applied externally to VEE, GND becomes a virtual ground because of an internal diode between VEE and GND. The GND current flows through the forward biased diode and out VEE. GND is always the signal ground from which the voltage reference and all amplifier inputs are referenced. VREF: The reference voltage equal to 5.0 V. 7 Submit Documentation Feedback |
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Description similaire - UC2849DW |
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