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CDCV850DGG Fiches technique(PDF) 5 Page - Texas Instruments |
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CDCV850DGG Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 20 page CDCV850 2.5-V PHASE LOCK LOOP CLOCK DRIVER WITH 2-LINE SERIAL INTERFACE SCAS647D − OCTOBER 2000 − REVISED APRIL 2013 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK Input voltage All inputs VDDQ = 2.3 V, II = –18 mA –1.2 V V High level output voltage VDDQ = min to max, IOH = –1 mA VDDQ – 0.1 V VOH High-level output voltage VDDQ = 2.3 V, IOH = –12 mA 1.7 V Lll t t VDDQ = min to max, IOL = 1 mA 0.1 VOL Low-level output voltage VDDQ = 2.3 V, IOL = 12 mA 0.6 V VOL voltage SDATA VDDI = 3.0 V, IOL = 3 mA 0.4 V IOH High-level output current VDDQ = 2.3 V, VO = 1 V –18 –32 mA IOL Low-level output current VDDQ = 2.3 V, VO = 1.2 V 26 35 mA VO Output voltage swing For load condition see Figure 3 1.1 VDDQ – 0.4 V VOX Output differential cross voltage VDDQ/2 − 0.2 VDDQ/2 VDDQ/2 + 0.2 V II Input current SDATA, SCLK VDDQ = 3.6 V, VI = 0 V to 3.6 V +10/−50 μA II Input current CLK, FBIN VDDQ = 2.7 V, VI = 0 V to 2.7 V ±10 μA IOZ High-impedance-state output current VDDQ = 2.7 V, VO = VDDQ or GND ±10 μA IDDPD Power-down current on VDDQ + AVDD CLK at 0 MHz; Σ of IDD and AIDD 150 250 μA IDDPD Power down current on VDDI CLK at 0 MHz; VDDQ = 3.6 V 3 20 μA IDD Dynamic current on VDDQ VDDQ = 2.7 V, fO = 100 MHz All differential output pairs are terminated with 120 Ω / CL = 4 pF 205 230 mA AI(DD) Supply current on AVDD AVDD = 2.7 V, fO = 100 MHz 4 6 mA IDDI Supply current on VDDI VDDI = 3.6 V SCLK and SDATA = 3.6 V 1 2 mA CI Input capacitance VDDQ = 2.5 V VI = VDDQ or GND 2 2.5 3 pF CO Output capacitance VDDQ = 2.5 V VO = VDDQ or GND 2.5 3 3.5 pF † All typical values are at respective nominal VDDQ. ‡ The value of VOC is expected to be |VTR + VCP|/2. In case of each clock directly terminated by a 120-Ω resistor, where VTR is the true input signal voltage and VCP is the complementary input signal voltage (see Figure 3). |
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