ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E

3

FN7921.0

February 20, 2012

Pin Configurations

ISL32450E, ISL32453E

(14 LD SOIC)

TOP VIEW

ISL32450E, ISL32453E

(10 LD MSOP)

TOP VIEW

ISL32452E, ISL32455E

(8 LD SOIC, 8 LD MSOP)

TOP VIEW

ISL32457E

(8 LD SOIC, 8 LD MSOP)

TOP VIEW

NOTE: Evaluate creepage and clearance requirements at your maximum fault voltage before using small pitch packages (e.g., MSOP).

NC

RO

RE

DE

DI

GND

GND

NC

A

B

Z

Y

NC

1

2

3

4

5

6

7

14

13

12

11

10

9

8

D

R

RO

RE

DE

DI

GND

A

B

Z

Y

1

2

3

4

5

10

9

8

7

6

D

R

RO

RE

DE

DI

1

2

3

4

8

7

6

5

B/Z

A/Y

GND

D

R

RO

INV

DE

DI

1

2

3

4

8

7

6

5

B/Z

A/Y

GND

D

R

Truth Tables

TRANSMITTING

INPUTS

OUTPUTS

RE

DE

DI

INV (Note 4)

Y

Z

X11

0

1

0

X10

0

0

1

X11

1

0

1

X10

1

1

0

0

0

X

X

High-Z

High-Z

10

X

X

High-Z

(Note 5)

High-Z

(Note 5)

NOTES:

4. Parts without the INV pin follow the rows with INV = “0” and “X”.

5. Low Power Shutdown Mode (see Notes 14 and 19).

RECEIVING

INPUTS

OUTPUT

RE

(Note 19)

DE (Half

Duplex)

DE (Full

Duplex)

A-B

INV

(Note 4)

RO

00

X

≥ -0.01V

0

1

00

X

≤ -0.2V

0

0

00

X

≤ 0.01V

1

1

00

X

≥ 0.2V

1

0

00

X

Inputs

Open or

Shorted

X1

10

0

X

X

High-Z

(Note 5)

11

1

X

X

High-Z