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IRF3808STRRPBF Fiches technique(PDF) 7 Page - International Rectifier |
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IRF3808STRRPBF Fiches technique(HTML) 7 Page - International Rectifier |
7 / 12 page 7 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback April 24, 2014 IRFB3207ZPbF/IRFS3207ZPbF/IRFSL3207ZPbF Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms V GS V DS 90% 10% t d(on) t d(off) t r t f V GS Pulse Width < 1μs Duty Factor < 0.1% V DD V DS L D D.U.T + - Fig 21b. Unclamped Inductive Waveforms Fig 21a. Unclamped Inductive Test Circuit tp V(BR)DSS IAS RG IAS 0.01 Ω tp D.U.T L VDS + - VDD DRIVER A 15V 20V VGS Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform Vds Vgs Id Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs 1K VCC DUT 0 L Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer P.W. Period di/dt Diode Recovery dv/dt Ripple ≤ 5% Body Diode Forward Drop Re-Applied Voltage Reverse Recovery Current Body Diode Forward Current VGS=10V VDD ISD Driver Gate Drive D.U.T. ISD Waveform D.U.T. VDS Waveform Inductor Curent D = P.W. Period * VGS = 5V for Logic Level Devices * + - + + + - - - RG VDD • dv/dt controlled by RG • Driver same type as D.U.T. • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test D.U.T Inductor Current |
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