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CS4952-CQ Fiches technique(PDF) 11 Page - Cirrus Logic

No de pièce CS4952-CQ
Description  NTSC/PAL Digital Video Encoder
Download  44 Pages
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Fabricant  CIRRUS [Cirrus Logic]
Site Internet  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4952-CQ Fiches technique(HTML) 11 Page - Cirrus Logic

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CS4952/53
DS223PP2
11
INTRODUCTION
The CS4952/3 is a complete multi-standard digital
video encoder implemented in current 5-volt only
CMOS technology. CCIR601 or CCIR656 compli-
ant digital video input can be converted into
NTSC-M, PAL B, PAL D, PAL G, PAL H, PAL I,
PAL M, PAL N, or PAL N Argentina-compatible
analog video. The CS4952/3 is designed to connect
to MPEG1 and MPEG2 digital video decompres-
sors without glue logic.
Two 9-bit DAC outputs provide high quality
S-Video analog output while two other 9-bit DACs
simultaneously generate composite analog video.
The CS4952/3 will accept 8-bit YCbCr or 8-bit
YUV input data.
The CS4952/3 is completely configured and con-
trolled via an 8-bit host interface port or an I
2C
compatible serial interface. This host port provides
access and control of all CS4952/3 options and fea-
tures like closed caption insertion, interrupts, etc.
In order to lower the end user set-top overall sys-
tem costs, the CS4952/3 provides an internal volt-
age reference which eliminates the requirement for
an external discrete 3-pin voltage reference.
FUNCTIONAL DESCRIPTION
In the following subsections, the functions of the
CS4952/3 will be described. The descriptions refer
to the block diagram on the cover page.
Video Timing Generator
All timing generation is accomplished via a
27 MHz input applied to the CLK pin. The
CS4952/3 can also accept an optional color burst
crystal on the ADDR & XTAL pins. See section:
Color Subcarrier Synthesizer (page 12), for further
details.
The Video Timing Generator is responsible for or-
chestrating most all of the other modules in the de-
vice. It works in harmony with external sync input
timing or by providing external sync timing out-
puts. It automatically disables color burst on appro-
priate scan lines and generates serration and
equalization pulses on appropriate scan lines.
The CS4952/3 is designed to function as a video
timing master or video timing slave. In both Master
and Slave Modes, all timing is sampled and assert-
ed with the rising edge of the CLK pin.
In most cases the CS4952/3 will serve as the video
timing master. The master timing cannot be exter-
nally altered other than through the host interface
by changing the video display modes: PAL or
NTSC and Progressive Scan. HSYNC, VSYNC
and FIELD are configured as outputs for Master
Mode. HSYNC can also be defined as a composite
blanking output signal in Master Mode. Exact hor-
izontal and vertical display timing is addressed in
section: Operational Description (page 14).
In Slave Mode HSYNC and VSYNC are config-
ured as input pins and are used to initialize inde-
pendent vertical and horizontal timing generators
upon their respective falling edges. FIELD remains
an output in Slave Mode.
The CS4952/3 also provides a CCIR-656 Slave
Mode where the video input stream contains EAV
and SAV codes. In this case, proper HSYNC
VSYNC timing is extracted automatically without
aid from any inputs other than the V [7:0].
CCIR-656 input data is sampled with the leading
edge of CLK. Slave Mode vertical and horizontal
timing derived via CCIR-656 or external hardware
must be equivalent to timing generated by the
CS4952/3 in Master Mode.
Video Input Formatter
The video input formatter translates YCbCr input
data into YUV information, if necessary, and splits
the luma and chroma information for filtering, scal-
ing, and modulation.


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