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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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SLA7080MPR Fiches technique(PDF) 11 Page - Sanken electric |
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SLA7080MPR Fiches technique(HTML) 11 Page - Sanken electric |
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11 / 18 page  11 SANKEN ELECTRIC CO., LTD. 28610.23, Rev. 1 Unipolar 2-Phase Stepping Motor Driver ICs SLA7080M Series The resistance value of the incorporated resistors varies accord- ing to the rated currents. Rated Current Detected Resistance Value (A) (Ω Typical) 1 0.305 1.5 0.305 2 0.205 3 0.155 Each resistance value shown above includes the inherent resis- tance (approximately 5 mΩ) in the SLA7080M due to product structure. In particular, be cautious about noise on the VDD line. When the noise on VDD line exceeds 0.5 V, device malfunction may be caused. To avoid this, special attention should be paid to the layout of the ground circuits. The separation of the VDD ground and the VBB ground from the product GND pin is effective in reducing the noise. Clocking Switch Signals In normal operation, the input signal for switching is received from an external microcomputer into the INx pins. However, in an application where the signal cannot be input, for example, due to the limitation of ports, this function can be performed using the following method. Refer to figure 11, which illustrates a topol- ogy for a synchronization signal generation circuit that uses clock signals. When a logic high level signal is input to the circuit, the capacitor in the circuit is charged and the SYNC signal is set to logic low level in the SLA7080M. When the clock signal is stopped at low level, the capacitor is dis- charged by the resistor and the SYNC signal is set to logic high, causing the SLA7080M to shift to the synchronous mode. The RC time constant should be determined by the minimum clock frequency used. In the case of a sequence that keeps the clock input signal at logic high, an inverter circuit must be added. Setting Motor Currents for Constant Running In the SLA7080M series the motor current level, IO , is deter- mined by the internal sense resistors, RS, and the values selected for the external components R1 and R2 (see figure 12). Io is calculated by the following formulas: R1 R2 + R2 × VDD VREF = (2) VREF RS IO = (3) If VREF is set below 0.04 V, the accuracy of IO setting is highly likely to be degraded due to the variation between individual devices and the impedance of the application trace layout. Lower Limit of Motor Current Control The SLA7080M series uses a self-excitation PWM current con- trol system with the fixed PWM off-time, toff. When the energy stored in the motor coil is dissipated in less than toff , the coil current flows as an intermittent current as shown in figure 13. That is to say, the PWM average current is decreased and the motor torque is lowered. When the current begins to flow in the coil intermittently, this state is considered the lower limit of the current control, IO(min). Figure 10. FLAG pin equivalent circuit Figure 11. External circuit for detecting phase control signals FLAG VDD SLA7080MPR ESD protection SLA7080M Phase VCC 74HC14 SYNC |
Numéro de pièce similaire - SLA7080MPR |
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Description similaire - SLA7080MPR |
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