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IRF7769L2PBF Fiches technique(PDF) 1 Page - International Rectifier |
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IRF7769L2PBF Fiches technique(HTML) 1 Page - International Rectifier |
1 / 11 page www.irf.com 1 DirectFET Power MOSFET Typical values (unless otherwise specified) PD - 97413B IRF7769L2TRPbF IRF7769L2TR1PbF DirectFET ISOMETRIC L8 Applicable DirectFET Outline and Substrate Outline l RoHS Compliant, Halogen Free l Lead-Free (Qualified up to 260°C Reflow) l Ideal for High Performance Isolated Converter Primary Switch Socket l Optimized for Synchronous Rectification l Low Conduction Losses l High Cdv/dt Immunity l Low Profile (<0.7mm) l Dual Sided Cooling Compatible l Compatible with existing Surface Mount Techniques l Industrial Qualified Description The IRF7769L2TR/TR1PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has a footprint smaller than a D2PAK and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems. The IRF7769L2TR/TR1PbF is optimized for high frequency switching and synchronous rectification applications. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance power converters. 2/2/2010 Fig 1. Typical On-Resistance vs. Gate Voltage Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 0.09mH, RG = 25Ω, IAS = 74A. Notes: 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 VGS, Gate-to-Source Voltage (V) 0.00 2.00 4.00 6.00 8.00 10.00 12.00 TJ = 25°C TJ = 125°C ID = 74A Fig 2. Typical On-Resistance vs. Drain Current 20 40 60 80 100 ID, Drain Current (A) 2.80 2.90 3.00 3.10 TA= 25°C VGS = 8.0V VGS = 7.0V VGS = 10V VGS = 15V VDSS VGS RDS(on) 100V min ±20V max 2.8m Ω@ 10V Qg tot Qgd Vgs(th) 200nC 110nC 2.7V SB SC M2 M4 L4 L6 L8 D S G D S S S S S S S Absolute Maxim um Ratings Parameter Units V DS Drain-to-Source Voltage V V GS Gate-to-Source Voltage ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) f ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) f A ID @ TA = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) e ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) f IDM Pulsed Drain Current g E AS Single Pulse Avalanche Energy h mJ IAR Avalanche Current Ãg A 74 375 260 Max. 88 20 500 ±20 100 124 |
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