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PGA202 Fiches technique(PDF) 8 Page - Burr-Brown (TI) |
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PGA202 Fiches technique(HTML) 8 Page - Burr-Brown (TI) |
8 / 10 page ® PGA202/203 8 GAIN SELECTION Gain selection is accomplished by the application of a 2-bit digital word to the gain select inputs. Table I shows the gains for the different possible values of the digital input word. The logic inputs are referred to their own separate digital common pin, which can be connected to any voltage be- tween the minus supply and 8V below the positive supply. The gains are all internally trimmed to an initial accuracy of better than 0.1%, so no external gain adjustment is required. However, if necessary the gains can be increased by the use of an external attenuator around the output stage as shown in Figure 3. Recommended resistor values for certain selected output gains are given in Table II. PGA202 PGA203 A1 A0 GAIN ERROR GAIN ERROR 0 0 1 0.05% 1 0.05% 0 1 10 0.05% 2 0.05% 1 0 100 0.05% 4 0.05% 1 1 1000 0.10% 8 0.05% TABLE I. Software Gain Selection. TABLE II. Output Stage Gain Control. OUTPUT GAIN R1 R2 25k Ω 5k Ω 52k Ω 8k Ω 10 1k Ω 9k Ω FIGURE 3. Gain Increase with Buffered Attenuator. COMMON-MODE INPUT RANGE Unlike the classical three op amp type of circuit, the input common-mode range of the PGA202/203 does not depend on the differential input and the gain. In the standard three op amp circuit, the input common-mode signal must be kept below the maximum output voltage of the input amplifier minus 1/2 the final output voltage. If, for example, these amplifiers can swing ±12V, then to get 12V at the output you must restrict the input common-mode voltage to only 6V. The circuitry of the PGA202/203 is such that the common- mode input range applies to either input pin regardless of the output voltage. FIGURE 4. Current Boosting the Output. OUTPUT SENSE An output sense has been provided to allow greater accuracy in connecting the load. By attaching this feedback point to the load at the load site, IR drops due to the load currents are eliminated since they are inside the feedback loop. Proper connection is shown in Figure 1. When more current is required, a power booster can be placed in the feedback loop as shown in Figure 4. Buffer errors are minimized by the loop gain of the output amplifier. OUTPUT FILTERING The summing nodes of the output amplifier have also been made available to allow for output filtering. By placing matched capacitors in parallel with the existing internal capacitors as shown in Figure 5, you can lower the fre- quency response of the output amplifier. This will reduce the noise of the amplifier, at the cost of a slower response. The nominal frequency responses for some selected values of capacitor are shown in Table III. FIGURE 5. Output Filtering. CUTOFF FREQUENCY C1 AND C2 1MHz None 100kHz 47pF 10kHz 525pF TABLE III. Output Frequency vs Filter Capacitors. PGA202 8 7 2 11 12 + – V OUT OPA633 V IN 1 14 4 R L A 0 A 1 PGA202 8 7 4 11 12 + – V OUT + – V IN R 1 R 2 OPA602 PGA202 8 7 10 4 11 12 V OUT + – V IN 5 C EXT C EXT |
Numéro de pièce similaire - PGA202 |
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Description similaire - PGA202 |
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