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SN74LS132D Fiches technique(PDF) 1 Page - Motorola, Inc |
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SN74LS132D Fiches technique(HTML) 1 Page - Motorola, Inc |
1 / 5 page Figure 1. VIN versus VOUT Transfer Function 5 4 3 2 1 0 0 0.4 0.95 1.2 1.8 2 VIN, INPUT VOLTAGE (VOLTS) VCC = 5 V TA = 25°C 5-212 FAST AND LS TTL DATA QUAD 2-INPUT SCHMITT TRIGGER NAND GATE The SN54 / 74LS132 contains four 2-Input NAND Gates which accept stan- dard TTL input signals and provide standard TTL output levels. They are ca- pable of transforming slowly changing input signals into sharply defined, jitter- free output signals. Additionally, they have greater noise margin than conventional NAND Gates. Each circuit contains a 2-input Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem pole output. The Schmitt trigger uses positive feedback to effectively speed-up slow input transitions, and provide different input threshold voltages for positive and negative-going tran- sitions. This hysteresis between the positive-going and negative-going input thresholds (typically 800 mV) is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations. As long as one input remains at a more positive voltage than VT+ (MAX), the gate will respond to the transitions of the other input as shown in Figure 1. 14 13 12 11 10 9 1 2 3 4 5 6 VCC 8 7 GND LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) SN54/74LS132 QUAD 2-INPUT SCHMITT TRIGGER NAND GATE LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 632-08 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 ORDERING INFORMATION SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXD SOIC 14 1 D SUFFIX SOIC CASE 751A-02 |
Numéro de pièce similaire - SN74LS132D |
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Description similaire - SN74LS132D |
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