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74LVC821ABQ Fiches technique(PDF) 9 Page - NXP Semiconductors

No de pièce 74LVC821ABQ
Description  10-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive-edge trigger; 3-state
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LVC821ABQ Fiches technique(HTML) 9 Page - NXP Semiconductors

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74LVC821A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 23 November 2012
9 of 20
NXP Semiconductors
74LVC821A
10-bit D-type flip-flop; 5 V tolerance; positive-edge trigger; 3-state
[1]
Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD  VCC2  fi  N+ (CL  VCC2  fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(C
L  VCC
2
 f
o) = sum of the outputs
tW
pulse width
clock HIGH or LOW; see Figure 7
VCC = 1.65 V to 1.95 V
5.0
-
-
5.0
-
ns
VCC = 2.3 V to 2.7 V
4.0
-
-
4.0
-
ns
VCC = 2.7 V
3.3
-
-
3.3
-
ns
VCC = 3.0 V to 3.6 V
3.3
1.7
-
3.3
-
ns
tsu
set-up time
Dn to CP; see Figure 8
VCC = 1.65 V to 1.95 V
3.5
-
-
3.5
-
ns
VCC = 2.3 V to 2.7 V
2.0
-
-
2.0
-
ns
VCC = 2.7 V
0.9
-
-
0.9
-
ns
VCC = 3.0 V to 3.6 V
1.9
0.6
-
1.9
-
ns
th
hold time
Dn to CP; see Figure 8
VCC = 1.65 V to 1.95 V
3.0
-
-
3.0
-
ns
VCC = 2.3 V to 2.7 V
2.0
-
-
2.0
-
ns
VCC = 2.7 V
1.5
-
-
1.5
-
ns
VCC = 3.0 V to 3.6 V
1.5
0.0
-
1.5
-
ns
fmax
maximum
frequency
see Figure 7
VCC = 1.65 V to 1.95 V
100
-
-
80
-
MHz
VCC = 2.3 V to 2.7 V
125
-
-
100
-
MHz
VCC = 2.7 V
150
-
-
120
-
MHz
VCC = 3.0 V to 3.6 V
150
200
-
120
-
MHz
tsk(o)
output skew
time
VCC = 3.0 V to 3.6 V
[3]
-
-
1.0
-
1.5
ns
CPD
power
dissipation
capacitance
per input; VI =GND to VCC
[4]
VCC = 1.65 V to 1.95 V
-
12.5
-
-
-
pF
VCC = 2.3 V to 2.7 V
-
14.7
-
-
-
pF
VCC = 3.0 V to 3.6 V
-
16.6
-
-
-
pF
Table 7.
Dynamic characteristics ...continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max


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