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TPS24750RUV Fiches technique(PDF) 10 Page - Texas Instruments

No de pièce TPS24750RUV
Description  12A eFuse Circuit Protector with Current Monitor
Download  42 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPS24750RUV Fiches technique(HTML) 10 Page - Texas Instruments

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background image
T
FLT
10 A
C =
t
1.35 V
´
TPS24750
TPS24751
SLVSC87 – OCTOBER 2013
www.ti.com
TIMER: A capacitor CT connected from the TIMER pin to GND determines the overload fault timing. TIMER
sources 10 µA when an overload is present, and discharges CT at 10 µA otherwise. Internal FET is turned off
when VTIMER reaches 1.35 V. In an application implementing auto-retry after a fault, this capacitor also
determines the period before the internal FET is re-enabled. A minimum timing capacitance of 1 nF is
recommended to ensure proper operation of the fault timer. The value of CT can be calculated from the desired
fault time tFLT, using Equation 4.
(4)
Either latch mode (TPS24750, TPS24752) or retry mode (TPS24751, TPS24753) occurs if the load current
exceeds the current limit threshold or the fast trip shutdown threshold. While in latch mode, the TIMER pin
continues to periodically charge and discharge the attached capacitor. In retry mode, the internal MOSFET is
disabled for sixteen cycles of TIMER charging and discharging. The TIMER pin is pulled to GND by a 2 mA
current source at the end of the 16th cycle of charging and discharging. The internal MOSFET is then re-enabled.
The TIMER pin capacitor, CT, can also be discharged to GND during latch mode or retry mode in the following
way:
A 2-mA current sinks TIMER whenever any of the following occurs:
VEN is below its falling threshold.
VVCC drops below the UVLO threshold.
VOV is above its rising threshold.
TIMER is not affected when the die temperature exceeds the OTSD threshold.
VCC: This pin performs three functions. First, it provides biasing power to the integrated circuit. Second, it serves
as an input to the power-on reset (POR) and undervoltage lockout (UVLO) functions. Bypass capacitor C1,
shown in the typical application diagram on the front page, should be connected to the positive terminal of VVCC.
A capacitance of at least 10 nF is recommended.
10
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: TPS24750 TPS24751


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