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TPS2115PW Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS2115PW Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 22 page www.ti.com TPS2114 TPS2115 SLVS447A – DECEMBER 2002 – REVISED MARCH 2004 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range (unless otherwise noted) TPS2115 PARAMETER TEST CONDITIONS UNIT MIN TYP MAX UNDERVOLTAGE LOCKOUT Falling edge 1.15 1.25 IN1 and IN2 UVLO V Rising edge 1.30 1.35 IN1 and IN2 UVLO hysteresis(2) 30 57 65 mV Falling edge 24 2.53 Internal VDD UVLO (the higher of IN1 and IN2) V Rising edge 2.58 2.8 Internal VDD UVLO hysteresis (2) 30 50 75 mV UVLO deglitch for IN1, IN2(2) Falling edge 110 µs REVERSE CONDUCTION BLOCKING D0 = D1 = high, VI(INx) = 3.3 V. Connect OUT to a 5 Minimum output-to-input voltage V supply through a series 1-k Ω resistor. Let ∆V O(I_block) 80 100 120 mV difference to block switching D0 = low. Slowly decrease the supply voltage until OUT connects to IN1. THERMAL SHUTDOWN Thermal shutdown threshold(2) TPS211x is in current limit. 135 Recovery from thermal shutdown(2) TPS211x is in current limit. 125 °C Hysteresis(2) 10 IN2-IN1 COMPARATORS Hysteresis of IN2-IN1 comparator 0.1 0.2 V Deglitch of IN2-IN1 comparator, (both ↑↓ )(2) 90 150 220 µs STAT OUTPUT Leakage current VO(STAT) = 5.5 V 0.01 1 µA Saturation voltage II(STAT) = 2 mA, IN1 switch is on 0.13 0.4 V Deglitch time (falling edge only) 150 µs (2) Not tested in production. 5 |
Numéro de pièce similaire - TPS2115PW |
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Description similaire - TPS2115PW |
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