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HCPL-7710-020E Fiches technique(PDF) 10 Page - AVAGO TECHNOLOGIES LIMITED

No de pièce HCPL-7710-020E
Description  40 ns Propagation Delay, CMOS Optocoupler
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Fabricant  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Site Internet  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

HCPL-7710-020E Fiches technique(HTML) 10 Page - AVAGO TECHNOLOGIES LIMITED

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Application Information
Bypassing and PC Board Layout
The HCPL-x710 optocouplers are extremely easy to
use. No external interface circuitry is required because
the HCPL-x710 use high-speed CMOS IC technology
allowing CMOS logic to be connected directly to the
inputs and outputs.
As shown in Figure 12, the only external components
required for proper operation are two bypass capacitors.
Capacitor values should be between 0.01 µF and 0.1 µF.
For each capacitor, the total lead length between both
ends of the capacitor and the power-supply pins should
not exceed 20 mm. Figure 13 illustrates the recommend-
ed printed circuit board layout for the HPCL-x710.
Figure 12. Recommended Printed Circuit Board layout.
Figure 13. Recommended Printed Circuit Board layout.
Propagation Delay, Pulse-Width Distortion and Propagation Delay
Skew
Propagation Delay is a figure of merit which describes
how quickly a logic signal propagates through a
system. The propagation delay from low to high (tPLH)
is the amount of time required for an input signal to
propagate to the output, causing the output to change
from low to high. Similarly, the propagation delay from
high to low (tPHL) is the amount of time required for the
input signal to propagate to the output, causing the
output to change from high to low. See Figure 14.
Figure 14.
INPUT
tPLH
tPHL
OUTPUT
VI
VO
10%
90%
90%
10%
VOH
VOL
0 V
50%
5 V CMOS
2.5 V CMOS
HCPL-0710 fig 13
VDD2
HCPL-0710 fig 12
C1
C2
VO
GND2
VDD1
VI
GND1
C1, C2 = 0.01 µF TO 0.1 µF
7
5
6
8
2
3
4
1
GND2
C1
C2
NC
VDD2
NC
VO
VDD1
VI
HCPL-0710 fig 11
C1, C2 = 0.01 µF TO 0.1 µF
GND1


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