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AD9961BCPZ Fiches technique(PDF) 10 Page - Analog Devices

No de pièce AD9961BCPZ
Description  10-/12-Bit, Low Power, Broadband MxFE
Download  61 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

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AD9961/AD9963
Data Sheet
Rev. A | Page 10 of 60
Pin No.
Mnemonic
Description
36
TRXCLK
Qualifying Clock for the TRXD Bus.
37
TXCLK
Qualifying Clock for the TXD Bus. It can be configured as either an input or output.
38
TXIQ/TXnRX
Dual Function Pin. In half-duplex mode (TXnRX), this pin controls the direction of the TRX port. In full-
duplex mode (TXIQ), this input signal indicates to which DAC, I or Q, the TxDAC input data is intended.
39 to 48
TXD9 to TXD0
TxDAC Input Data.
52
DVDD18
Digital Core 1.8 V Supply.
53
DLL18V
Output of DLL18V Voltage Regulator.
54
DLLFILT
DLL Filter Output.
55
CLK18V
Output of CLK18V Voltage Regulator.
56, 57
CLKN, CLKP
Differential Input Clock.
58
CLK33V
Input to CLK18V and DLL18V Voltage Regulators (1.8 V to 3.3 V). If LDOs are not being used, short Pin 58
to Pin 55. CLK33V must track TXVDD.
59, 60
TXQN, TXQP
Complementary DAC Q Current Outputs.
61, 67
TXVDD
Analog Supply Voltage for Tx Path (1.8 V to 3.3 V). TXVDD must track CLK33V.
62
TXCML
Common-Mode Input Voltage for the I and Q Tx DACs.
63
REFIO
Decoupling Point for Internal DAC 1.0 V Bandgap Reference. Use a 0.1 µF capacitor to AGND.
64
TXGND
Transmit Path Ground.
65, 66
TXIP, TXIN
Complementary DAC I Current Outputs.
68
DAC12B
Auxiliary DAC B Output.
69
DAC12A
Auxiliary DAC A Output.
70
AUXIO3
Selectable Analog Pin. Programmable to either Input 3 of the auxiliary ADC or to the auxiliary DAC10B
output.
71
AUXIO2
Selectable Analog Pin. Programmable to either Input 2 of the auxiliary ADC or to the auxiliary DAC10A
output.
72
AUXIN1
Input 1 of Auxiliary ADC.
EPAD
Thermal Pad Under Chip. This must be connected to AGND for proper chip operation. It provides both a
thermal and electrical connection to the PCB.


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