Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

AD7663 Fiches technique(PDF) 6 Page - Analog Devices

No de pièce AD7663
Description  16-Bit, 570 kSPS CMOS ADC
Download  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD7663 Fiches technique(HTML) 6 Page - Analog Devices

Back Button AD7663 Datasheet HTML 2Page - Analog Devices AD7663 Datasheet HTML 3Page - Analog Devices AD7663 Datasheet HTML 4Page - Analog Devices AD7663 Datasheet HTML 5Page - Analog Devices AD7663 Datasheet HTML 6Page - Analog Devices AD7663 Datasheet HTML 7Page - Analog Devices AD7663 Datasheet HTML 8Page - Analog Devices AD7663 Datasheet HTML 9Page - Analog Devices AD7663 Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 23 page
background image
REV.
AD7665
–6–
PIN FUNCTION DESCRIPTION
Pin
No.
Mnemonic
Type
Description
1
AGND
P
Analog Power Ground Pin.
2
AVDD
P
Input Analog Power Pin. Nominally 5 V.
3, 44–48
NC
No Connect.
4
BYTESWAP
Parallel Mode Selection (8/16 Bit). When LOW, the LSB is output on D[7:0] and the MSB is
output on D[15:8]. When HIGH, the LSB is output on D[15:8] and the MSB is output on D[7:0].
5OB/
2C
DI
Straight Binary/Binary Twos Complement. When OB/
2C is HIGH, the digital output is straight
binary; when LOW, the MSB is inverted, resulting in a twos complement output from its internal
shift register.
6
WARP
DI
Mode Selection. When HIGH and IMPULSE LOW, this input selects the fastest mode, the
maximum throughput is achievable, and a minimum conversion rate must be applied in order
to guarantee full specified accuracy. When LOW, full accuracy is maintained independent of
the minimum conversion rate.
7
IMPULSE
DI
Mode Selection. When HIGH and WARP LOW, this input selects a reduced Power Mode.
In this mode, the power dissipation is approximately proportional to the sampling rate.
8
SER/
PAR
DI
Serial/Parallel Selection Input. When LOW, the Parallel Port is selected; when HIGH, the
Serial Interface Mode is selected and some bits of the data bus are used as a Serial Port.
9, 10
D[0:1]
DO
Bit 0 and Bit 1 of the Parallel Port Data Output Bus. When SER/
PAR is HIGH, these outputs
are in high impedance.
11, 12
D[2:3] or
DI/O
When SER/
PAR is LOW, these outputs are used as Bit 2 and Bit 3 of the Parallel Port Data
Output Bus.
DIVSCLK[0:1]
When SER/
PAR is HIGH, EXT/INT is LOW and RDC/SDIN is LOW, which is the Serial
Master Read after Convert Mode. These inputs, part of the Serial Port, are used to slow down,
if desired, the internal serial clock that clocks the data output. In the other serial modes, these
pins are high impedance outputs.
13
D[4]
DI/O
When SER/
PAR is LOW, this output is used as Bit 4 of the Parallel Port Data Output Bus.
or EXT/
INT
When SER/
PAR is HIGH, this input, part of the Serial Port, is used as a digital select input for
choosing the internal or an external data clock, called respectively, Master and Slave Modes.
With EXT/
INT tied LOW, the internal clock is selected on SCLK output. With EXT/INT set to a
logic HIGH, output data is synchronized to an external clock signal connected to the SCLK
input and the external clock is gated by
CS.
14
D[5]
DI/O
When SER/
PAR is LOW, this output is used as Bit 5 of the Parallel Port Data Output Bus.
or INVSYNC
When SER/
PAR is HIGH, this input, part of the Serial Port, is used to select the active state
of the SYNC signal. When LOW, SYNC is active HIGH. When HIGH, SYNC is active LOW.
15
D[6]
DI/O
When SER/
PAR is LOW, this output is used as Bit 6 of the Parallel Port Data Output Bus.
or INVSCLK
When SER/
PAR is HIGH, this input, part of the Serial Port, is used to invert the SCLK signal.
It is active in both master and slave mode.
16
D[7]
DI/O
When SER/
PAR is LOW, this output is used as Bit 7 of the Parallel Port Data Output Bus.
or RDC/SDIN
When SER/
PAR is HIGH, this input, part of the Serial Port, is used as either an external data
input or a read mode selection input, depending on the state of EXT/
INT.
When EXT/
INT is HIGH, RDC/SDIN could be used as a data input to daisy-chain the conversion
results from two or more ADCs onto a single SDOUT line. The digital data level on SDIN is
output on DATA with a delay of 16 SCLK periods after the initiation of the read sequence.
When EXT/
INT is LOW, RDC/SDIN is used to select the Read Mode. When RDC/SDIN is
HIGH, the previous data is output on SDOUT during conversion. When RDC/SDIN is LOW,
the data can be output on SDOUT only when the conversion is complete.
17
OGND
P
Input/Output Interface Digital Power Ground.
18
OVDD
P
Input/Output Interface Digital Power. Nominally at the same supply as the supply of the host
interface (5 V or 3 V).
19
DVDD
P
Digital Power. Nominally at 5 V.
20
DGND
P
Digital Power Ground.
C


Numéro de pièce similaire - AD7663

FabricantNo de pièceFiches techniqueDescription
logo
Analog Devices
AD7663 AD-AD7663 Datasheet
336Kb / 23P
   16-Bit 1 MSPS SAR Unipolar ADC with Ref
REV. PrA
AD7663 AD-AD7663 Datasheet
804Kb / 28P
   16-Bit 500 kSPS PulSARTM Unipolar ADC with Reference
Rev. 0
AD7663 AD-AD7663 Datasheet
818Kb / 32P
   16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
REV. 0
AD7663 AD-AD7663 Datasheet
983Kb / 28P
   18-Bit, 2.5 LSB INL, 800 kSPS SAR ADC
Rev. A
AD7663 AD-AD7663 Datasheet
820Kb / 32P
   16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
REV. 0
More results

Description similaire - AD7663

FabricantNo de pièceFiches techniqueDescription
logo
Analog Devices
AD7665 AD-AD7665_17 Datasheet
413Kb / 24P
   16-Bit, 570 kSPS CMOS ADC
AD7665 AD-AD7665 Datasheet
348Kb / 24P
   16-Bit, 570 kSPS CMOS ADC
REV. 0
AD7664 AD-AD7664 Datasheet
392Kb / 19P
   16-Bit, 570 kSPS CMOS ADC
REV. 0
AD7665 AD-AD7665_15 Datasheet
355Kb / 23P
   16-Bit, 570 kSPS CMOS ADC
REV. C
AD7650 AD-AD7650 Datasheet
265Kb / 21P
   16-Bit, 570 kSPS Low Cost CMOS ADC
AD7664 AD-AD7664_17 Datasheet
556Kb / 25P
   16-Bit, 570 kSPS PulSAR Unipolar CMOS ADC
AD7664ASTZRL AD-AD7664ASTZRL Datasheet
320Kb / 24P
   16-Bit, 570 kSPS PulSAR Unipolar CMOS ADC
REV. E
AD7650 AD-AD7650_15 Datasheet
228Kb / 20P
   16-Bit, 570 kSPS Low Cost CMOS ADC
REV. 0
AD7664 AD-AD7664_15 Datasheet
386Kb / 24P
   16-Bit, 570 kSPS
REV. E
AD7660 AD-AD7660 Datasheet
218Kb / 20P
   16-Bit, 100 kSPS CMOS ADC
REV. 0
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com