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Moteur de recherche de fiches techniques de composants électroniques |
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LM3S300-IQN25-C2 Fiches technique(PDF) 6 Page - Texas Instruments |
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LM3S300-IQN25-C2 Fiches technique(HTML) 6 Page - Texas Instruments |
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6 / 498 page  10.3 Functional Description ................................................................................................. 324 10.3.1 Transmit/Receive Logic ............................................................................................... 324 10.3.2 Baud-Rate Generation ................................................................................................. 324 10.3.3 Data Transmission ...................................................................................................... 325 10.3.4 FIFO Operation ........................................................................................................... 325 10.3.5 Interrupts .................................................................................................................... 326 10.3.6 Loopback Operation .................................................................................................... 327 10.4 Initialization and Configuration ..................................................................................... 327 10.5 Register Map .............................................................................................................. 328 10.6 Register Descriptions .................................................................................................. 329 11 Synchronous Serial Interface (SSI) .................................................................... 362 11.1 Block Diagram ............................................................................................................ 362 11.2 Signal Description ....................................................................................................... 362 11.3 Functional Description ................................................................................................. 363 11.3.1 Bit Rate Generation ..................................................................................................... 363 11.3.2 FIFO Operation ........................................................................................................... 363 11.3.3 Interrupts .................................................................................................................... 364 11.3.4 Frame Formats ........................................................................................................... 364 11.4 Initialization and Configuration ..................................................................................... 372 11.5 Register Map .............................................................................................................. 373 11.6 Register Descriptions .................................................................................................. 374 12 Inter-Integrated Circuit (I2C) Interface ................................................................ 400 12.1 Block Diagram ............................................................................................................ 401 12.2 Signal Description ....................................................................................................... 401 12.3 Functional Description ................................................................................................. 401 12.3.1 I2C Bus Functional Overview ........................................................................................ 402 12.3.2 Available Speed Modes ............................................................................................... 404 12.3.3 Interrupts .................................................................................................................... 404 12.3.4 Loopback Operation .................................................................................................... 405 12.3.5 Command Sequence Flow Charts ................................................................................ 405 12.4 Initialization and Configuration ..................................................................................... 412 12.5 Register Map .............................................................................................................. 413 12.6 Register Descriptions (I2C Master) ............................................................................... 414 12.7 Register Descriptions (I2C Slave) ................................................................................. 427 13 Analog Comparators ............................................................................................ 436 13.1 Block Diagram ............................................................................................................ 437 13.2 Signal Description ....................................................................................................... 437 13.3 Functional Description ................................................................................................. 438 13.3.1 Internal Reference Programming .................................................................................. 439 13.4 Initialization and Configuration ..................................................................................... 440 13.5 Register Map .............................................................................................................. 441 13.6 Register Descriptions .................................................................................................. 441 14 Pin Diagram .......................................................................................................... 449 15 Signal Tables ........................................................................................................ 450 15.1 Signals by Pin Number ................................................................................................ 450 15.2 Signals by Signal Name ............................................................................................... 452 15.3 Signals by Function, Except for GPIO ........................................................................... 454 June 18, 2012 6 Texas Instruments-Production Data Table of Contents NRND: Not recommended for new designs. |
Numéro de pièce similaire - LM3S300-IQN25-C2 |
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Description similaire - LM3S300-IQN25-C2 |
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