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DAC8043UG4 Fiches technique(PDF) 2 Page - Texas Instruments |
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DAC8043UG4 Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 11 page 2 ® DAC8043 DAC8043U DAC8043UC SPECIFICATIONS ELECTRICAL CHARACTERISTICS At V DD = +5V; VREF = +10V; IOUT = GND = 0V; TA = Full Temperature Range specified under Absolute Maximum Ratings, unless otherwise noted. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 12 12 Bits Nonlinearity(1) INL ±1 ±1/2 LSB Differential Nonlinearity(2) DNL ±1 ±1/2 LSB Gain Error(3) FSE T A = +25°C ±2 ±1 LSB T A = Full Temp Range ±2 ±2 LSB Gain Tempco(5) TC FSE ±5 ±5 ppm/ °C Power Supply Rejection Ratio PSRR ∆V DD = ±5% ±0.0006 ±0.002 ±0.0006 ±0.002 %/% Output Leakage Current(4) I LKG T A = +25°C ±5 ±5nA T A = Full Temp Range ±100 ±25 nA Zero Scale Error(7, 12) I ZSE T A = +25°C 0.03 0.03 LSB T A = Full Temp Range 0.60 0.15 LSB Input Resistance(8) R IN 7 11 15 7 11 15 k Ω AC PERFORMANCE Output Current Settling Time(5, 6) t S T A = +25°C 0.25 1 0.25 1 µs Digital-to-Analog Glitch V REF = 0V 2 20 2 20 nVs Energy(5, 10) QI OUT = Load = 100Ω C EXT = 13pF DAC Register Loaded Alternately with all 0s and all 1s Feedthrough Error(5, 11) FT V REF = 20Vp-p at f = 10kHz 0.7 1 0.7 1 mVp-p (V REF to IOUT) Digital Input = 0000 0000 0000 T A = +25°C Total Harmonic Distortion(5) THD V REF = 6VRMS at 1kHz –85 –85 dB DAC Register Loaded with all 1s Output Noise Voltage Density(5, 13) e N 10Hz to 100kHz 17 17 nV/ √Hz Between R FB and IOUT DIGITAL INPUTS Digital Input High V IH 2.4 2.4 V Digital Input Low V IL 0.8 0.8 V Input Leakage Current(9) I IL V IN = 0V to +5V ±1 ±1 µA Input Capacitance(5, 11) C IN V IN = 0V 8 8 pF ANALOG OUTPUTS Output Capacitance(5) C OUT Digital Inputs = V IH 110 110 pF Digital Inputs = V IL 80 80 pF TIMING CHARACTERISTICS(5, 14) Data Setup Time t DS T A = Full Temperature Range 40 40 ns Data Hold Time t DH T A = Full Temperature Range 80 80 ns Clock Pulse Width High t CH T A = Full Temperature Range 90 90 ns Clock Pulse Width Low t CL T A = Full Temperature Range 120 120 ns Load Pulse Width t LD T A = Full Temperature Range 120 120 ns LSB Clock into Input Register to Load DAC Register Time t ASB T A = Full Temperature Range 0 0 ns POWER SUPPLY Supply Voltage V DD 4.75 5 5.25 4.75 5 5.25 V Supply Current I DD Digital Inputs = V IH or VIL 500 500 µA Digital Inputs = 0V or V DD 100 100 µA NOTES: (1) ±1/2 LSB = ±0.012% of Full Scale. (2) All grades are monotonic to 12-bits over temperature. (3) Using internal feedback resistor. (4) Applies to I OUT; All digital inputs = 0V. (5) Guaranteed by design and not tested. (6) I OUT Load = 100Ω, CEXT = 13pF, digital input = 0V to VDD or VDD to 0V. Extrapolated to 1/2 LSB: t S = propagation delay (tPD) + 9τ where τ = measured time constant of the final RC decay. (7) VREF = +10V, all digital inputs = 0V. (8) Absolute temperature coefficient is less than ±50ppm/°C. (9) Digital inputs are CMOS gates: I IN is typically 1nA at +25°C. (10) VREF = 0V, all digital inputs = 0V to VDD or VDD to 0V. (11) All digital inputs = 0V. (12) Calculated from worst case R REF: IZSE (in LSBs) = (RREF X ILKG X 4096)/VREF. (13) Calculations from en = √4K TRB where: K = Boltzmann constant, J/ °K, R = resistance, Ω. T = Resistor temperature, °K, B = bandwidth, Hz. (14) Tested at V IN = 0V or VDD. |
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