A.C. and Timing Characteristics

Values shown in this table are design targets and are subject to change before product release. The following specifica-

tions apply for V

Ω to GND, C

Boldface limits apply for T

MIN

≤ T

A

≤ T

Symbol

Parameter

Conductions

Typical

Limits

Units

(Limits)

f

SCLK

SCLK Frequency

30

MHz (max)

t

s

Output Voltage Settling Time

(Note 10)

400h to C00h code

change, R

Ω

C

L

≤ 200 pF

8

10

µs (max)

C

12

µs

00Fh to FF0h code

change, R

Ω

C

L

≤ 200 pF

8

µs

C

12

µs

SR

Output Slew Rate

1

V/µs

Glitch Impulse

Code change from 800h to 7FFh

12

nV-sec

Digital Feedthrough

0.5

nV-sec

t

WU

Wake-Up Time

V

1.6

µs

V

1.9

µs

1/f

SCLK

SCLK Cycle Time

33

ns (min)

t

H

SCLK High time

5

13

ns (min)

t

L

SCLK Low Time

5

13

ns (min)

t

SUCL

Set-up Time SYNC to SCLK Rising

Edge

−15

0

ns (min)

t

SUD

Data Set-Up Time

2.5

5

ns (min)

t

DHD

Data Hold Time

2.5

4.5

ns (min)

t

CS

SCLK fall to rise of SYNC

V

0

3

ns (min)

V

−2

1

ns (min)

t

SYNC

SYNC High Time

2.7

≤ V

A

≤ 3.6

9

20

ns (min)

3.6

≤ V

A

≤ 5.5

5

10

ns (min)

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed

specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test

conditions.

Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified

mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two.

junction-to-ambient thermal resistance (

for maximum power dissipation will be reached only when the device is operated in a severe fault condition (e.g., when input or output pins are driven beyond the

power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.

Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k

Ω resistor. Machine model is 220 pF discharged through ZERO Ohms.

Note 6: See the section entitled "Surface Mount" found in any post 1986 National Semiconductor Linear Data Book for methods of soldering surface mount devices.

20114904

Level).

Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production.

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