7

Package Characteristics

Over recommended operating conditions (T

A

= -55 to +125

Parameter

Symbol

Test Conditions

Group A

Subgroups (13)

Limits

Units

Fig

Note

Min.

Typ.*

Max.

Input-Output

Leakage Current

I

I-O

V

I-O

= 1500Vdc, RH



65%, t = 5 sec., T

A

=

25

1

1.0

5, 6

Resistance

(Input-Output)

R

I-O

V

I-O

= 500 V

DC



6

Capacitance

(Input-Output)

C

I-O

f = 1 MHz

2.5

pF

6

*All typicals at T

A

= 25

Notes:

1. Maximum pulse width = 10

O

peak minimum = 2.0 A. See Applications section for additional details on limiting I

OH

peak.

2. Maximum pulse width = 50

3. In this test V

OH

is measured with a dc load current. When driving capacitive loads V

OH

will approach V

CC

as I

OH

approaches zero amps.

4. Maximum pulse width = 1 ms, maximum duty cycle = 20%.

5. This is a momentary withstand test, not an operating condition.

6. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together.

7.

The difference between t

PHL

and t

PLH

between any two HCPL-5120 parts under the same test condition.

8.

Pins 1 and 4 need to be connected to LED common.

9.

Common mode transient immunity in the high state is the maximum tolerable dV

CM

/dt of the common mode pulse, V

CM

, to assure that the

output will remain in the high state (i.e., V

O

> 15.0 V).

10. Common mode transient immunity in a low state is the maximum tolerable dV

CM

/dt of the common mode pulse, V

CM

, to assure that the

output will remain in a low state (i.e., V

O

< 1.0 V).

11. This load condition approximates the gate load of a 1200 V/75A IGBT.

12. Pulse Width Distortion (PWD) is defined as |t

PHL

-t

PLH

| for any given device.

13. Standard parts receive 100% testing at 25

groups 1 and 9, 2 and 10, 3 and 11, respectively).

14. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to limits

specified for all lots not specifically tested.