TEA1751LT_1301 datasheet(7/31 Pages) NXP

No de pièce	TEA1751LT_1301

Description	HV start-up DCM/QR flyback controller with integrated DCM/QR PFC controller

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Fabricant	NXP [NXP Semiconductors]

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TEA1751LT

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Product data sheet

Rev. 3. — 9 January 2013

7 of 31

NXP Semiconductors

TEA1751LT

HV start-up flyback controller with integrated PFC controller

If during start-up the LATCH pin does not reach the Ven(LATCH) level before VCC reaches

Vth(UVLO), it is deactivated. The charge current is then switched on again.

When the flyback converter starts, VFBCTRL is monitored. If this output voltage does not

reach its intended regulation level within a specified time, the voltage on the FBCTRL pin

reaches the Vto(FBCTRL) level. An error is then assumed and a latched reset is initiated.

When one of the protection functions is activated, both converters stop switching and the

VCC voltage drops to Vth(UVLO). A latched protection recharges capacitor CVCC using the

HV pin, but does not restart the converters. To provide safe restart protection, the

capacitor is recharged using the HV pin and the device restarts (see block diagram,

Figure 1).

If OVP of the PFC circuit (VVOSENSE >VOVP(VOSENSE)) occurs, the PFC controller stops

switching until the VOSENSE pin voltage drops to less than VOVP(VOSENSE). If a mains

undervoltage is detected, VVINSENSE <Vstop(VINSENSE), the PFC controller stops switching

until VVINSENSE >Vstart(VINSENSE) again.

When the voltage on pin VCC drops below the undervoltage lockout level, both controllers

stop switching and re-enter the safe restart mode. In the safe restart mode, the driver

outputs are disabled and the VCC pin voltage is recharged using the HV pin.

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