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N0604N-S19-AY Fiches technique(PDF) 2 Page - Renesas Technology Corp |
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N0604N-S19-AY Fiches technique(HTML) 2 Page - Renesas Technology Corp |
2 / 8 page N0604N Chapter Title R07DS0850EJ0100 Rev.1.00 Page 2 of 6 Aug 27, 2012 Electrical Characteristics (TA = 25°C, all terminals are connected) Item Symbol MIN. TYP. MAX. Unit Test Conditions Zero Gate Voltage Drain Current IDSS 1 μA VDS = 60 V, VGS = 0 V Gate Leakage Current IGSS ±100 nA VGS = ±20 V, VDS = 0 V Gate to Source Cut-off Voltage VGS(off) 2.0 4.0 V VDS = 10 V, ID = 1 mA Forward Transfer Admittance ∗1 | yfs | 30 S VDS = 5 V, ID = 41 A Drain to Source On-state Resistance ∗1 RDS(on) 5.1 6.5 m Ω VGS = 10 V, ID = 41 A Input Capacitance Ciss 4150 pF VDS = 25 V, Output Capacitance Coss 310 pF VGS = 0 V, Reverse Transfer Capacitance Crss 165 pF f = 1 MHz Turn-on Delay Time td(on) 24 ns VDD = 30 V, ID = 41 A, Rise Time tr 8 ns VGS = 10 V, Turn-off Delay Time td(off) 64 ns RG = 0 Ω Fall Time tf 7 ns Total Gate Charge QG 75 nC VDD = 48 V, Gate to Source Charge QGS 21 nC VGS = 10 V, Gate to Drain Charge QGD 21 nC ID = 82 A Body Diode Forward Voltage ∗1 VF(S–D) 1.5 V IF = 82 A, VGS = 0 V Reverse Recovery Time trr 38 ns Reverse Recovery Charge Qrr 39 nC IF = 82 A, VGS = 0 V, di/dt = 100 A/ μ s Note: ∗1. Pulsed TEST CIRCUIT 3 GATE CHARGE VGS = 20 → 0 V PG. RG = 25 Ω 50 Ω D.U.T. L VDD TEST CIRCUIT 1 AVALANCHE CAPABILITY PG. D.U.T. RL VDD TEST CIRCUIT 2 SWITCHING TIME RG PG. IG = 2 mA 50 Ω D.U.T. RL VDD ID VDD IAS VDS BVDSS Starting Tch VGS 0 τ = 1 s Duty Cycle ≤ 1% τ VGS Wave Form VDS Wave Form VGS VDS 10% 0 0 90% 90% 90% VGS VDS ton toff td(on) tr td(off) tf 10% 10% μ |
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