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AD9106BCPZ Fiches technique(PDF) 4 Page - Analog Devices |
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AD9106BCPZ Fiches technique(HTML) 4 Page - Analog Devices |
4 / 48 page AD9106 Data Sheet Rev. A | Page 4 of 48 SPECIFICATIONS DC SPECIFICATIONS (3.3 V) TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V; internal CLDO, DLDO1, and DLDO2; IOUTFS = 4 mA, maximum sample rate, unless otherwise noted. Table 1. Parameter Min Typ Max Unit RESOLUTION 12 Bits ACCURACY at 3.3 V Differential Nonlinearity (DNL) ±0.4 LSB Integral Nonlinearity (INL) ±0.5 LSB DAC OUTPUTS Offset Error ±.00025 % of FSR Gain Error Internal Reference—No Automatic IOUTFS Calibration −1.0 +1.0 % of FSR Full-Scale Output Current1 at 3.3 V 2 4 8 mA Output Resistance 200 MΩ Output Compliance Voltage −0.5 +1.0 V Crosstalk, DAC to DAC (fOUT = 10 MHz) 96 dBC Crosstalk, DAC to DAC (fOUT = 60 MHz) 82 dBc DAC TEMPERATURE DRIFT Gain with Internal Reference ±251 ppm/°C Internal Reference Voltage ±119 ppm/°C REFERENCE OUTPUT Internal Reference Voltage with AVDD = 3.3 V 0.8 1.0 1.2 V Output Resistance 10 kΩ REFERENCE INPUT Voltage Compliance 0.1 1.25 V Input Resistance External, Reference Mode 1 MΩ DAC MATCHING Gain Matching—No Automatic IOUTFS Calibration ±0.75 % of FSR 1 Based on use of 8 kΩ external xRSET resistors. |
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Description similaire - AD9106BCPZ |
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