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74AUP2G06GS Fiches technique(PDF) 7 Page - NXP Semiconductors |
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74AUP2G06GS Fiches technique(HTML) 7 Page - NXP Semiconductors |
7 / 18 page 74AUP2G06 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 — 6 December 2011 7 of 18 NXP Semiconductors 74AUP2G06 Low-power dual inverter with open-drain output 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8. Symbol Parameter Conditions 25 C 40 C to +125 C Unit Min Typ[1] Max Min Max (85 C) Max (125 C) CL = 5 pF tpd propagation delay nA to nY; see Figure 7 [2] VCC = 0.8 V - 12.8 - - - - ns VCC = 1.1 V to 1.3 V 2.3 4.3 9.9 2.0 10.9 12.0 ns VCC = 1.4 V to 1.6 V 1.8 3.1 6.1 1.5 7.1 7.8 ns VCC = 1.65 V to 1.95 V 1.5 2.8 4.7 1.2 5.7 6.3 ns VCC = 2.3 V to 2.7 V 1.2 2.2 3.2 1.0 3.9 4.3 ns VCC = 3.0 V to 3.6 V 1.1 2.2 3.3 0.8 3.6 4.0 ns CL = 10 pF tpd propagation delay nA to nY; see Figure 7 [2] VCC = 0.8 V - 15.8 - - - - ns VCC = 1.1 V to 1.3 V 2.7 5.4 11.2 2.5 13.2 15.0 ns VCC = 1.4 V to 1.6 V 2.2 3.9 7.0 2.0 8.5 9.4 ns VCC = 1.65 V to 1.95 V 1.9 3.6 5.4 1.7 6.7 7.4 ns VCC = 2.3 V to 2.7 V 1.7 2.9 3.8 1.4 4.5 5.0 ns VCC = 3.0 V to 3.6 V 1.6 3.2 4.6 1.2 4.9 5.4 ns CL = 15 pF tpd propagation delay nA to nY; see Figure 7 [2] VCC = 0.8 V - 18.8 - - - - ns VCC = 1.1 V to 1.3 V 3.2 6.4 12.2 2.9 15.2 17.0 ns VCC = 1.4 V to 1.6 V 2.6 4.6 7.7 2.3 9.4 10.0 ns VCC = 1.65 V to 1.95 V 2.3 4.5 6.6 2.1 7.3 8.1 ns VCC = 2.3 V to 2.7 V 2.1 3.5 4.6 1.7 5.1 5.7 ns VCC = 3.0 V to 3.6 V 2.0 4.0 6.0 1.5 6.5 7.2 ns CL = 30 pF tpd propagation delay nA to nY; see Figure 7 [2] VCC = 0.8 V - 27.8 - - - - ns VCC = 1.1 V to 1.3 V 4.4 9.3 16.5 3.9 19.3 21.3 ns VCC = 1.4 V to 1.6 V 3.6 6.8 10.1 3.2 12.0 13.2 ns VCC = 1.65 V to 1.95 V 3.2 6.8 10.7 2.9 11.0 12.1 ns VCC = 2.3 V to 2.7 V 2.9 5.3 7.2 2.6 7.8 8.6 ns VCC = 3.0 V to 3.6 V 2.9 6.5 10.5 2.5 10.8 11.9 ns |
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