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TMP86FS49FG Fiches technique(PDF) 4 Page - Toshiba Semiconductor |
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TMP86FS49FG Fiches technique(HTML) 4 Page - Toshiba Semiconductor |
4 / 42 page Page 2 1.1 Features TMP86FS49FG 12. 10-bit successive approximation type AD converter Analog inputs: 16ch 13. Key On Wake Up : 4ch 14. Clock operation Single clock mode Dual clock mode 15. Low power consumption operation STOP mode: Oscillation stops. (Battery/Capacitor back-up.) SLOW1 mode: Low power consumption operation using low-frequency clock.(High-frequency clock stop.) SLOW2 mode: Low power consumption operation using low-frequency clock.(High-frequency clock oscillate.) IDLE0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using high fre- quency clock. Release by falling edge of the source clock which is set by TBTCR<TBTCK>. IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interru- puts(CPU restarts). IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by inter- ruputs. (CPU restarts). SLEEP0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using low fre- quency clock.Release by falling edge of the source clock which is set by TBTCR<TBTCK>. SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interru- put.(CPU restarts). SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interruput. 16. Wide operation voltage: 4.5 V~5.5 V at 16.0MHz /32.768 kHz 3.0 V~3.6 V at 8 MHz /32.768 kHz TENTATIVE |
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Description similaire - TMP86FS49FG |
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